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drm/amd/display: fix counter in wait_for_no_pipes_pending

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[Why]
Wait counter is not being reset for each pipe.

[How]
Move counter reset into pipe loop scope.

Signed-off-by: Roman Li <roman.li@amd.com>
Reviewed-by: Zhan Liu <Zhan.Liu@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Roman Li 2020-02-26 17:30:29 -05:00 committed by Alex Deucher
parent b95e51eb9f
commit 80797dd6f1
1 changed files with 2 additions and 3 deletions
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5
drivers/gpu/drm/amd/display/dc/core/dc.c
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@ -834,11 +834,10 @@ static void disable_dangling_plane(struct dc *dc, struct dc_state *context)
static void wait_for_no_pipes_pending(struct dc *dc, struct dc_state *context) static void wait_for_no_pipes_pending(struct dc *dc, struct dc_state *context)
{ {
int i; int i;
int count = 0;
struct pipe_ctx *pipe;
PERF_TRACE(); PERF_TRACE();
for (i = 0; i < MAX_PIPES; i++) { for (i = 0; i < MAX_PIPES; i++) {
pipe = &context->res_ctx.pipe_ctx[i]; int count = 0;
struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
if (!pipe->plane_state) if (!pipe->plane_state)
continue; continue;