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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k

Browse Source 
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k:
  m68k: Add missing I/O macros {in,out}{w,l}_p() for !CONFIG_ISA
  m68k: Remove big kernel lock in cache flush code
  m68k: __pa(): cast arg to long
  fbdev: atafb - Remove undead ifdef ATAFB_FALCON
  zorro: Fix device_register() error handling
  fbdev/m68k: Fix section mismatches in q40fb.c
  m68k/m68knommu: merge the MMU and non-MMU traps.h
  m68k/m68knommu: merge MMU and non-MMU thread_info.h
  m68k/m68knommu: merge MMU and non-MMU atomic.h
  m68k/m68knommu: clean up page.h
  m68k/m68knommu: merge machdep.h files into a single file
  m68k/m68knommu: merge MMU and non-MMU string.h
  m68k/m68knommu: Remove dead SMP config option
  m68k: move definition of THREAD_SIZE into thread_info_mm.h
  m68k: Use asm-generic/ioctls.h (enables termiox)
  m68k: Remove dead GG2 config option
This commit is contained in:
Linus Torvalds 2010-10-22 17:33:35 -07:00
commit 80c226fbef
34 changed files with 834 additions and 1543 deletions
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4
arch/m68k/Kconfig
View File

@ -434,7 +434,7 @@ config PROC_HARDWARE
config ISA config ISA
bool bool
depends on Q40 || AMIGA_PCMCIA || GG2 depends on Q40 || AMIGA_PCMCIA
default y default y
help help
Find out whether you have ISA slots on your motherboard. ISA is the Find out whether you have ISA slots on your motherboard. ISA is the
@ -445,7 +445,7 @@ config ISA
config GENERIC_ISA_DMA config GENERIC_ISA_DMA
bool bool
depends on Q40 || AMIGA_PCMCIA || GG2 depends on Q40 || AMIGA_PCMCIA
default y default y
config ZONE_DMA config ZONE_DMA

1
arch/m68k/include/asm/amigahw.h
View File

@ -102,7 +102,6 @@ struct amiga_hw_present {
AMIGAHW_DECLARE(ALICE_NTSC); /* NTSC Alice (8374) */ AMIGAHW_DECLARE(ALICE_NTSC); /* NTSC Alice (8374) */
AMIGAHW_DECLARE(MAGIC_REKICK); /* A3000 Magic Hard Rekick */ AMIGAHW_DECLARE(MAGIC_REKICK); /* A3000 Magic Hard Rekick */
AMIGAHW_DECLARE(PCMCIA); /* PCMCIA Slot */ AMIGAHW_DECLARE(PCMCIA); /* PCMCIA Slot */
AMIGAHW_DECLARE(GG2_ISA); /* GG2 Zorro2ISA Bridge */
AMIGAHW_DECLARE(ZORRO); /* Zorro AutoConfig */ AMIGAHW_DECLARE(ZORRO); /* Zorro AutoConfig */
AMIGAHW_DECLARE(ZORRO3); /* Zorro III */ AMIGAHW_DECLARE(ZORRO3); /* Zorro III */
}; };

210
arch/m68k/include/asm/atomic.h
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@ -1,7 +1,211 @@
#ifdef __uClinux__ #ifndef __ARCH_M68K_ATOMIC__
#include "atomic_no.h" #define __ARCH_M68K_ATOMIC__
#include <linux/types.h>
#include <asm/system.h>
/*
* Atomic operations that C can't guarantee us. Useful for
* resource counting etc..
*/
/*
* We do not have SMP m68k systems, so we don't have to deal with that.
*/
#define ATOMIC_INIT(i) { (i) }
#define atomic_read(v) (*(volatile int *)&(v)->counter)
#define atomic_set(v, i) (((v)->counter) = i)
/*
* The ColdFire parts cannot do some immediate to memory operations,
* so for them we do not specify the "i" asm constraint.
*/
#ifdef CONFIG_COLDFIRE
#define ASM_DI "d"
#else #else
#include "atomic_mm.h" #define ASM_DI "di"
#endif #endif
static inline void atomic_add(int i, atomic_t *v)
{
__asm__ __volatile__("addl %1,%0" : "+m" (*v) : ASM_DI (i));
}
static inline void atomic_sub(int i, atomic_t *v)
{
__asm__ __volatile__("subl %1,%0" : "+m" (*v) : ASM_DI (i));
}
static inline void atomic_inc(atomic_t *v)
{
__asm__ __volatile__("addql #1,%0" : "+m" (*v));
}
static inline void atomic_dec(atomic_t *v)
{
__asm__ __volatile__("subql #1,%0" : "+m" (*v));
}
static inline int atomic_dec_and_test(atomic_t *v)
{
char c;
__asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c), "+m" (*v));
return c != 0;
}
static inline int atomic_inc_and_test(atomic_t *v)
{
char c;
__asm__ __volatile__("addql #1,%1; seq %0" : "=d" (c), "+m" (*v));
return c != 0;
}
#ifdef CONFIG_RMW_INSNS
static inline int atomic_add_return(int i, atomic_t *v)
{
int t, tmp;
__asm__ __volatile__(
"1: movel %2,%1\n"
" addl %3,%1\n"
" casl %2,%1,%0\n"
" jne 1b"
: "+m" (*v), "=&d" (t), "=&d" (tmp)
: "g" (i), "2" (atomic_read(v)));
return t;
}
static inline int atomic_sub_return(int i, atomic_t *v)
{
int t, tmp;
__asm__ __volatile__(
"1: movel %2,%1\n"
" subl %3,%1\n"
" casl %2,%1,%0\n"
" jne 1b"
: "+m" (*v), "=&d" (t), "=&d" (tmp)
: "g" (i), "2" (atomic_read(v)));
return t;
}
#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
#else /* !CONFIG_RMW_INSNS */
static inline int atomic_add_return(int i, atomic_t * v)
{
unsigned long flags;
int t;
local_irq_save(flags);
t = atomic_read(v);
t += i;
atomic_set(v, t);
local_irq_restore(flags);
return t;
}
static inline int atomic_sub_return(int i, atomic_t * v)
{
unsigned long flags;
int t;
local_irq_save(flags);
t = atomic_read(v);
t -= i;
atomic_set(v, t);
local_irq_restore(flags);
return t;
}
static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
{
unsigned long flags;
int prev;
local_irq_save(flags);
prev = atomic_read(v);
if (prev == old)
atomic_set(v, new);
local_irq_restore(flags);
return prev;
}
static inline int atomic_xchg(atomic_t *v, int new)
{
unsigned long flags;
int prev;
local_irq_save(flags);
prev = atomic_read(v);
atomic_set(v, new);
local_irq_restore(flags);
return prev;
}
#endif /* !CONFIG_RMW_INSNS */
#define atomic_dec_return(v) atomic_sub_return(1, (v))
#define atomic_inc_return(v) atomic_add_return(1, (v))
static inline int atomic_sub_and_test(int i, atomic_t *v)
{
char c;
__asm__ __volatile__("subl %2,%1; seq %0"
: "=d" (c), "+m" (*v)
: ASM_DI (i));
return c != 0;
}
static inline int atomic_add_negative(int i, atomic_t *v)
{
char c;
__asm__ __volatile__("addl %2,%1; smi %0"
: "=d" (c), "+m" (*v)
: "id" (i));
return c != 0;
}
static inline void atomic_clear_mask(unsigned long mask, unsigned long *v)
{
__asm__ __volatile__("andl %1,%0" : "+m" (*v) : "id" (~(mask)));
}
static inline void atomic_set_mask(unsigned long mask, unsigned long *v)
{
__asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask));
}
static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
{
int c, old;
c = atomic_read(v);
for (;;) {
if (unlikely(c == (u)))
break;
old = atomic_cmpxchg((v), c, c + (a));
if (likely(old == c))
break;
c = old;
}
return c != (u);
}
#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
/* Atomic operations are already serializing */
#define smp_mb__before_atomic_dec() barrier()
#define smp_mb__after_atomic_dec() barrier()
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#include <asm-generic/atomic-long.h>
#include <asm-generic/atomic64.h> #include <asm-generic/atomic64.h>
#endif /* __ARCH_M68K_ATOMIC __ */

200
arch/m68k/include/asm/atomic_mm.h
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@ -1,200 +0,0 @@
#ifndef __ARCH_M68K_ATOMIC__
#define __ARCH_M68K_ATOMIC__
#include <linux/types.h>
#include <asm/system.h>
/*
* Atomic operations that C can't guarantee us. Useful for
* resource counting etc..
*/
/*
* We do not have SMP m68k systems, so we don't have to deal with that.
*/
#define ATOMIC_INIT(i) { (i) }
#define atomic_read(v) (*(volatile int *)&(v)->counter)
#define atomic_set(v, i) (((v)->counter) = i)
static inline void atomic_add(int i, atomic_t *v)
{
__asm__ __volatile__("addl %1,%0" : "+m" (*v) : "id" (i));
}
static inline void atomic_sub(int i, atomic_t *v)
{
__asm__ __volatile__("subl %1,%0" : "+m" (*v) : "id" (i));
}
static inline void atomic_inc(atomic_t *v)
{
__asm__ __volatile__("addql #1,%0" : "+m" (*v));
}
static inline void atomic_dec(atomic_t *v)
{
__asm__ __volatile__("subql #1,%0" : "+m" (*v));
}
static inline int atomic_dec_and_test(atomic_t *v)
{
char c;
__asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c), "+m" (*v));
return c != 0;
}
static inline int atomic_inc_and_test(atomic_t *v)
{
char c;
__asm__ __volatile__("addql #1,%1; seq %0" : "=d" (c), "+m" (*v));
return c != 0;
}
#ifdef CONFIG_RMW_INSNS
static inline int atomic_add_return(int i, atomic_t *v)
{
int t, tmp;
__asm__ __volatile__(
"1: movel %2,%1\n"
" addl %3,%1\n"
" casl %2,%1,%0\n"
" jne 1b"
: "+m" (*v), "=&d" (t), "=&d" (tmp)
: "g" (i), "2" (atomic_read(v)));
return t;
}
static inline int atomic_sub_return(int i, atomic_t *v)
{
int t, tmp;
__asm__ __volatile__(
"1: movel %2,%1\n"
" subl %3,%1\n"
" casl %2,%1,%0\n"
" jne 1b"
: "+m" (*v), "=&d" (t), "=&d" (tmp)
: "g" (i), "2" (atomic_read(v)));
return t;
}
#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
#else /* !CONFIG_RMW_INSNS */
static inline int atomic_add_return(int i, atomic_t * v)
{
unsigned long flags;
int t;
local_irq_save(flags);
t = atomic_read(v);
t += i;
atomic_set(v, t);
local_irq_restore(flags);
return t;
}
static inline int atomic_sub_return(int i, atomic_t * v)
{
unsigned long flags;
int t;
local_irq_save(flags);
t = atomic_read(v);
t -= i;
atomic_set(v, t);
local_irq_restore(flags);
return t;
}
static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
{
unsigned long flags;
int prev;
local_irq_save(flags);
prev = atomic_read(v);
if (prev == old)
atomic_set(v, new);
local_irq_restore(flags);
return prev;
}
static inline int atomic_xchg(atomic_t *v, int new)
{
unsigned long flags;
int prev;
local_irq_save(flags);
prev = atomic_read(v);
atomic_set(v, new);
local_irq_restore(flags);
return prev;
}
#endif /* !CONFIG_RMW_INSNS */
#define atomic_dec_return(v) atomic_sub_return(1, (v))
#define atomic_inc_return(v) atomic_add_return(1, (v))
static inline int atomic_sub_and_test(int i, atomic_t *v)
{
char c;
__asm__ __volatile__("subl %2,%1; seq %0"
: "=d" (c), "+m" (*v)
: "id" (i));
return c != 0;
}
static inline int atomic_add_negative(int i, atomic_t *v)
{
char c;
__asm__ __volatile__("addl %2,%1; smi %0"
: "=d" (c), "+m" (*v)
: "id" (i));
return c != 0;
}
static inline void atomic_clear_mask(unsigned long mask, unsigned long *v)
{
__asm__ __volatile__("andl %1,%0" : "+m" (*v) : "id" (~(mask)));
}
static inline void atomic_set_mask(unsigned long mask, unsigned long *v)
{
__asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask));
}
static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
{
int c, old;
c = atomic_read(v);
for (;;) {
if (unlikely(c == (u)))
break;
old = atomic_cmpxchg((v), c, c + (a));
if (likely(old == c))
break;
c = old;
}
return c != (u);
}
#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
/* Atomic operations are already serializing */
#define smp_mb__before_atomic_dec() barrier()
#define smp_mb__after_atomic_dec() barrier()
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#include <asm-generic/atomic-long.h>
#endif /* __ARCH_M68K_ATOMIC __ */

155
arch/m68k/include/asm/atomic_no.h
View File

@ -1,155 +0,0 @@
#ifndef __ARCH_M68KNOMMU_ATOMIC__
#define __ARCH_M68KNOMMU_ATOMIC__
#include <linux/types.h>
#include <asm/system.h>
/*
* Atomic operations that C can't guarantee us. Useful for
* resource counting etc..
*/
/*
* We do not have SMP m68k systems, so we don't have to deal with that.
*/
#define ATOMIC_INIT(i) { (i) }
#define atomic_read(v) (*(volatile int *)&(v)->counter)
#define atomic_set(v, i) (((v)->counter) = i)
static __inline__ void atomic_add(int i, atomic_t *v)
{
#ifdef CONFIG_COLDFIRE
__asm__ __volatile__("addl %1,%0" : "+m" (*v) : "d" (i));
#else
__asm__ __volatile__("addl %1,%0" : "+m" (*v) : "di" (i));
#endif
}
static __inline__ void atomic_sub(int i, atomic_t *v)
{
#ifdef CONFIG_COLDFIRE
__asm__ __volatile__("subl %1,%0" : "+m" (*v) : "d" (i));
#else
__asm__ __volatile__("subl %1,%0" : "+m" (*v) : "di" (i));
#endif
}
static __inline__ int atomic_sub_and_test(int i, atomic_t * v)
{
char c;
#ifdef CONFIG_COLDFIRE
__asm__ __volatile__("subl %2,%1; seq %0"
: "=d" (c), "+m" (*v)
: "d" (i));
#else
__asm__ __volatile__("subl %2,%1; seq %0"
: "=d" (c), "+m" (*v)
: "di" (i));
#endif
return c != 0;
}
static __inline__ void atomic_inc(volatile atomic_t *v)
{
__asm__ __volatile__("addql #1,%0" : "+m" (*v));
}
/*
* atomic_inc_and_test - increment and test
* @v: pointer of type atomic_t
*
* Atomically increments @v by 1
* and returns true if the result is zero, or false for all
* other cases.
*/
static __inline__ int atomic_inc_and_test(volatile atomic_t *v)
{
char c;
__asm__ __volatile__("addql #1,%1; seq %0" : "=d" (c), "+m" (*v));
return c != 0;
}
static __inline__ void atomic_dec(volatile atomic_t *v)
{
__asm__ __volatile__("subql #1,%0" : "+m" (*v));
}
static __inline__ int atomic_dec_and_test(volatile atomic_t *v)
{
char c;
__asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c), "+m" (*v));
return c != 0;
}
static __inline__ void atomic_clear_mask(unsigned long mask, unsigned long *v)
{
__asm__ __volatile__("andl %1,%0" : "+m" (*v) : "id" (~(mask)));
}
static __inline__ void atomic_set_mask(unsigned long mask, unsigned long *v)
{
__asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask));
}
/* Atomic operations are already serializing */
#define smp_mb__before_atomic_dec() barrier()
#define smp_mb__after_atomic_dec() barrier()
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
static inline int atomic_add_return(int i, atomic_t * v)
{
unsigned long temp, flags;
local_irq_save(flags);
temp = *(long *)v;
temp += i;
*(long *)v = temp;
local_irq_restore(flags);
return temp;
}
#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
static inline int atomic_sub_return(int i, atomic_t * v)
{
unsigned long temp, flags;
local_irq_save(flags);
temp = *(long *)v;
temp -= i;
*(long *)v = temp;
local_irq_restore(flags);
return temp;
}
#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
{
int c, old;
c = atomic_read(v);
for (;;) {
if (unlikely(c == (u)))
break;
old = atomic_cmpxchg((v), c, c + (a));
if (likely(old == c))
break;
c = old;
}
return c != (u);
}
#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
#define atomic_dec_return(v) atomic_sub_return(1,(v))
#define atomic_inc_return(v) atomic_add_return(1,(v))
#include <asm-generic/atomic-long.h>
#endif /* __ARCH_M68KNOMMU_ATOMIC __ */

3
arch/m68k/include/asm/entry_mm.h
View File

@ -3,6 +3,9 @@
#include <asm/setup.h> #include <asm/setup.h>
#include <asm/page.h> #include <asm/page.h>
#ifdef __ASSEMBLY__
#include <asm/thread_info.h>
#endif
/* /*
* Stack layout in 'ret_from_exception': * Stack layout in 'ret_from_exception':

43
arch/m68k/include/asm/io_mm.h
View File

@ -49,23 +49,6 @@
#define MULTI_ISA 0 #define MULTI_ISA 0
#endif /* Q40 */ #endif /* Q40 */
/* GG-II Zorro to ISA bridge */
#ifdef CONFIG_GG2
extern unsigned long gg2_isa_base;
#define GG2_ISA_IO_B(ioaddr) (gg2_isa_base+1+((unsigned long)(ioaddr)*4))
#define GG2_ISA_IO_W(ioaddr) (gg2_isa_base+ ((unsigned long)(ioaddr)*4))
#define GG2_ISA_MEM_B(madr) (gg2_isa_base+1+(((unsigned long)(madr)*4) & 0xfffff))
#define GG2_ISA_MEM_W(madr) (gg2_isa_base+ (((unsigned long)(madr)*4) & 0xfffff))
#ifndef MULTI_ISA
#define MULTI_ISA 0
#else
#undef MULTI_ISA
#define MULTI_ISA 1
#endif
#endif /* GG2 */
#ifdef CONFIG_AMIGA_PCMCIA #ifdef CONFIG_AMIGA_PCMCIA
#include <asm/amigayle.h> #include <asm/amigayle.h>
@ -89,8 +72,7 @@ extern unsigned long gg2_isa_base;
#endif #endif
#define ISA_TYPE_Q40 (1) #define ISA_TYPE_Q40 (1)
#define ISA_TYPE_GG2 (2) #define ISA_TYPE_AG (2)
#define ISA_TYPE_AG (3)
#if defined(CONFIG_Q40) && !defined(MULTI_ISA) #if defined(CONFIG_Q40) && !defined(MULTI_ISA)
#define ISA_TYPE ISA_TYPE_Q40 #define ISA_TYPE ISA_TYPE_Q40
@ -100,10 +82,6 @@ extern unsigned long gg2_isa_base;
#define ISA_TYPE ISA_TYPE_AG #define ISA_TYPE ISA_TYPE_AG
#define ISA_SEX 1 #define ISA_SEX 1
#endif #endif
#if defined(CONFIG_GG2) && !defined(MULTI_ISA)
#define ISA_TYPE ISA_TYPE_GG2
#define ISA_SEX 0
#endif
#ifdef MULTI_ISA #ifdef MULTI_ISA
extern int isa_type; extern int isa_type;
@ -125,9 +103,6 @@ static inline u8 __iomem *isa_itb(unsigned long addr)
#ifdef CONFIG_Q40 #ifdef CONFIG_Q40
case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_IO_B(addr); case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_IO_B(addr);
#endif #endif
#ifdef CONFIG_GG2
case ISA_TYPE_GG2: return (u8 __iomem *)GG2_ISA_IO_B(addr);
#endif
#ifdef CONFIG_AMIGA_PCMCIA #ifdef CONFIG_AMIGA_PCMCIA
case ISA_TYPE_AG: return (u8 __iomem *)AG_ISA_IO_B(addr); case ISA_TYPE_AG: return (u8 __iomem *)AG_ISA_IO_B(addr);
#endif #endif
@ -141,9 +116,6 @@ static inline u16 __iomem *isa_itw(unsigned long addr)
#ifdef CONFIG_Q40 #ifdef CONFIG_Q40
case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_IO_W(addr); case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_IO_W(addr);
#endif #endif
#ifdef CONFIG_GG2
case ISA_TYPE_GG2: return (u16 __iomem *)GG2_ISA_IO_W(addr);
#endif
#ifdef CONFIG_AMIGA_PCMCIA #ifdef CONFIG_AMIGA_PCMCIA
case ISA_TYPE_AG: return (u16 __iomem *)AG_ISA_IO_W(addr); case ISA_TYPE_AG: return (u16 __iomem *)AG_ISA_IO_W(addr);
#endif #endif
@ -167,9 +139,6 @@ static inline u8 __iomem *isa_mtb(unsigned long addr)
#ifdef CONFIG_Q40 #ifdef CONFIG_Q40
case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_MEM_B(addr); case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_MEM_B(addr);
#endif #endif
#ifdef CONFIG_GG2
case ISA_TYPE_GG2: return (u8 __iomem *)GG2_ISA_MEM_B(addr);
#endif
#ifdef CONFIG_AMIGA_PCMCIA #ifdef CONFIG_AMIGA_PCMCIA
case ISA_TYPE_AG: return (u8 __iomem *)addr; case ISA_TYPE_AG: return (u8 __iomem *)addr;
#endif #endif
@ -183,9 +152,6 @@ static inline u16 __iomem *isa_mtw(unsigned long addr)
#ifdef CONFIG_Q40 #ifdef CONFIG_Q40
case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_MEM_W(addr); case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_MEM_W(addr);
#endif #endif
#ifdef CONFIG_GG2
case ISA_TYPE_GG2: return (u16 __iomem *)GG2_ISA_MEM_W(addr);
#endif
#ifdef CONFIG_AMIGA_PCMCIA #ifdef CONFIG_AMIGA_PCMCIA
case ISA_TYPE_AG: return (u16 __iomem *)addr; case ISA_TYPE_AG: return (u16 __iomem *)addr;
#endif #endif
@ -217,9 +183,6 @@ static inline void isa_delay(void)
#ifdef CONFIG_Q40 #ifdef CONFIG_Q40
case ISA_TYPE_Q40: isa_outb(0,0x80); break; case ISA_TYPE_Q40: isa_outb(0,0x80); break;
#endif #endif
#ifdef CONFIG_GG2
case ISA_TYPE_GG2: break;
#endif
#ifdef CONFIG_AMIGA_PCMCIA #ifdef CONFIG_AMIGA_PCMCIA
case ISA_TYPE_AG: break; case ISA_TYPE_AG: break;
#endif #endif
@ -287,9 +250,13 @@ static inline void isa_delay(void)
#define outb(val,port) ((void)0) #define outb(val,port) ((void)0)
#define outb_p(val,port) ((void)0) #define outb_p(val,port) ((void)0)
#define inw(port) 0xffff #define inw(port) 0xffff
#define inw_p(port) 0xffff
#define outw(val,port) ((void)0) #define outw(val,port) ((void)0)
#define outw_p(val,port) ((void)0)
#define inl(port) 0xffffffffUL #define inl(port) 0xffffffffUL
#define inl_p(port) 0xffffffffUL
#define outl(val,port) ((void)0) #define outl(val,port) ((void)0)
#define outl_p(val,port) ((void)0)
#define insb(port,buf,nr) ((void)0) #define insb(port,buf,nr) ((void)0)
#define outsb(port,buf,nr) ((void)0) #define outsb(port,buf,nr) ((void)0)

80
arch/m68k/include/asm/ioctls.h
View File

@ -1,86 +1,8 @@
#ifndef __ARCH_M68K_IOCTLS_H__ #ifndef __ARCH_M68K_IOCTLS_H__
#define __ARCH_M68K_IOCTLS_H__ #define __ARCH_M68K_IOCTLS_H__
#include <asm/ioctl.h>
/* 0x54 is just a magic number to make these relatively unique ('T') */
#define TCGETS 0x5401
#define TCSETS 0x5402
#define TCSETSW 0x5403
#define TCSETSF 0x5404
#define TCGETA 0x5405
#define TCSETA 0x5406
#define TCSETAW 0x5407
#define TCSETAF 0x5408
#define TCSBRK 0x5409
#define TCXONC 0x540A
#define TCFLSH 0x540B
#define TIOCEXCL 0x540C
#define TIOCNXCL 0x540D
#define TIOCSCTTY 0x540E
#define TIOCGPGRP 0x540F
#define TIOCSPGRP 0x5410
#define TIOCOUTQ 0x5411
#define TIOCSTI 0x5412
#define TIOCGWINSZ 0x5413
#define TIOCSWINSZ 0x5414
#define TIOCMGET 0x5415
#define TIOCMBIS 0x5416
#define TIOCMBIC 0x5417
#define TIOCMSET 0x5418
#define TIOCGSOFTCAR 0x5419
#define TIOCSSOFTCAR 0x541A
#define FIONREAD 0x541B
#define TIOCINQ FIONREAD
#define TIOCLINUX 0x541C
#define TIOCCONS 0x541D
#define TIOCGSERIAL 0x541E
#define TIOCSSERIAL 0x541F
#define TIOCPKT 0x5420
#define FIONBIO 0x5421
#define TIOCNOTTY 0x5422
#define TIOCSETD 0x5423
#define TIOCGETD 0x5424
#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
#define TIOCSBRK 0x5427 /* BSD compatibility */
#define TIOCCBRK 0x5428 /* BSD compatibility */
#define TIOCGSID 0x5429 /* Return the session ID of FD */
#define TCGETS2 _IOR('T',0x2A, struct termios2)
#define TCSETS2 _IOW('T',0x2B, struct termios2)
#define TCSETSW2 _IOW('T',0x2C, struct termios2)
#define TCSETSF2 _IOW('T',0x2D, struct termios2)
#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */
#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
#define FIOCLEX 0x5451
#define FIOASYNC 0x5452
#define TIOCSERCONFIG 0x5453
#define TIOCSERGWILD 0x5454
#define TIOCSERSWILD 0x5455
#define TIOCGLCKTRMIOS 0x5456
#define TIOCSLCKTRMIOS 0x5457
#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
#define TIOCSERGETLSR 0x5459 /* Get line status register */
#define TIOCSERGETMULTI 0x545A /* Get multiport config */
#define TIOCSERSETMULTI 0x545B /* Set multiport config */
#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
#define FIOQSIZE 0x545E #define FIOQSIZE 0x545E
/* Used for packet mode */ #include <asm-generic/ioctls.h>
#define TIOCPKT_DATA 0
#define TIOCPKT_FLUSHREAD 1
#define TIOCPKT_FLUSHWRITE 2
#define TIOCPKT_STOP 4
#define TIOCPKT_START 8
#define TIOCPKT_NOSTOP 16
#define TIOCPKT_DOSTOP 32
#define TIOCPKT_IOCTL 64
#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
#endif /* __ARCH_M68K_IOCTLS_H__ */ #endif /* __ARCH_M68K_IOCTLS_H__ */

49
arch/m68k/include/asm/machdep.h
View File

@ -1,5 +1,44 @@
#ifdef __uClinux__ #ifndef _M68K_MACHDEP_H
#include "machdep_no.h" #define _M68K_MACHDEP_H
#else
#include "machdep_mm.h" #include <linux/seq_file.h>
#endif #include <linux/interrupt.h>
struct pt_regs;
struct mktime;
struct rtc_time;
struct rtc_pll_info;
struct buffer_head;
extern void (*mach_sched_init) (irq_handler_t handler);
/* machine dependent irq functions */
extern void (*mach_init_IRQ) (void);
extern void (*mach_get_model) (char *model);
extern void (*mach_get_hardware_list) (struct seq_file *m);
/* machine dependent timer functions */
extern unsigned long (*mach_gettimeoffset)(void);
extern int (*mach_hwclk)(int, struct rtc_time*);
extern unsigned int (*mach_get_ss)(void);
extern int (*mach_get_rtc_pll)(struct rtc_pll_info *);
extern int (*mach_set_rtc_pll)(struct rtc_pll_info *);
extern int (*mach_set_clock_mmss)(unsigned long);
extern void (*mach_gettod)(int *year, int *mon, int *day, int *hour,
int *min, int *sec);
extern void (*mach_reset)( void );
extern void (*mach_halt)( void );
extern void (*mach_power_off)( void );
extern unsigned long (*mach_hd_init) (unsigned long, unsigned long);
extern void (*mach_hd_setup)(char *, int *);
extern long mach_max_dma_address;
extern void (*mach_heartbeat) (int);
extern void (*mach_l2_flush) (int);
extern void (*mach_beep) (unsigned int, unsigned int);
/* Hardware clock functions */
extern void hw_timer_init(void);
extern unsigned long hw_timer_offset(void);
extern irqreturn_t arch_timer_interrupt(int irq, void *dummy);
extern void config_BSP(char *command, int len);
#endif /* _M68K_MACHDEP_H */

35
arch/m68k/include/asm/machdep_mm.h
View File

@ -1,35 +0,0 @@
#ifndef _M68K_MACHDEP_H
#define _M68K_MACHDEP_H
#include <linux/seq_file.h>
#include <linux/interrupt.h>
struct pt_regs;
struct mktime;
struct rtc_time;
struct rtc_pll_info;
struct buffer_head;
extern void (*mach_sched_init) (irq_handler_t handler);
/* machine dependent irq functions */
extern void (*mach_init_IRQ) (void);
extern void (*mach_get_model) (char *model);
extern void (*mach_get_hardware_list) (struct seq_file *m);
/* machine dependent timer functions */
extern unsigned long (*mach_gettimeoffset)(void);
extern int (*mach_hwclk)(int, struct rtc_time*);
extern unsigned int (*mach_get_ss)(void);
extern int (*mach_get_rtc_pll)(struct rtc_pll_info *);
extern int (*mach_set_rtc_pll)(struct rtc_pll_info *);
extern int (*mach_set_clock_mmss)(unsigned long);
extern void (*mach_reset)( void );
extern void (*mach_halt)( void );
extern void (*mach_power_off)( void );
extern unsigned long (*mach_hd_init) (unsigned long, unsigned long);
extern void (*mach_hd_setup)(char *, int *);
extern long mach_max_dma_address;
extern void (*mach_heartbeat) (int);
extern void (*mach_l2_flush) (int);
extern void (*mach_beep) (unsigned int, unsigned int);
#endif /* _M68K_MACHDEP_H */

26
arch/m68k/include/asm/machdep_no.h
View File

@ -1,26 +0,0 @@
#ifndef _M68KNOMMU_MACHDEP_H
#define _M68KNOMMU_MACHDEP_H
#include <linux/interrupt.h>
/* Hardware clock functions */
extern void hw_timer_init(void);
extern unsigned long hw_timer_offset(void);
extern irqreturn_t arch_timer_interrupt(int irq, void *dummy);
/* Machine dependent time handling */
extern void (*mach_gettod)(int *year, int *mon, int *day, int *hour,
int *min, int *sec);
extern int (*mach_set_clock_mmss)(unsigned long);
/* machine dependent power off functions */
extern void (*mach_reset)( void );
extern void (*mach_halt)( void );
extern void (*mach_power_off)( void );
extern void config_BSP(char *command, int len);
extern void do_IRQ(int irq, struct pt_regs *fp);
#endif /* _M68KNOMMU_MACHDEP_H */

50
arch/m68k/include/asm/page.h
View File

@ -1,5 +1,49 @@
#ifdef __uClinux__ #ifndef _M68K_PAGE_H
#include "page_no.h" #define _M68K_PAGE_H
#include <linux/const.h>
#include <asm/setup.h>
#include <asm/page_offset.h>
/* PAGE_SHIFT determines the page size */
#ifndef CONFIG_SUN3
#define PAGE_SHIFT (12)
#else #else
#include "page_mm.h" #define PAGE_SHIFT (13)
#endif #endif
#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
#define PAGE_MASK (~(PAGE_SIZE-1))
#define PAGE_OFFSET (PAGE_OFFSET_RAW)
#ifndef __ASSEMBLY__
/*
* These are used to make use of C type-checking..
*/
typedef struct { unsigned long pte; } pte_t;
typedef struct { unsigned long pmd[16]; } pmd_t;
typedef struct { unsigned long pgd; } pgd_t;
typedef struct { unsigned long pgprot; } pgprot_t;
typedef struct page *pgtable_t;
#define pte_val(x) ((x).pte)
#define pmd_val(x) ((&x)->pmd[0])
#define pgd_val(x) ((x).pgd)
#define pgprot_val(x) ((x).pgprot)
#define __pte(x) ((pte_t) { (x) } )
#define __pmd(x) ((pmd_t) { (x) } )
#define __pgd(x) ((pgd_t) { (x) } )
#define __pgprot(x) ((pgprot_t) { (x) } )
#endif /* !__ASSEMBLY__ */
#ifdef CONFIG_MMU
#include "page_mm.h"
#else
#include "page_no.h"
#endif
#include <asm-generic/getorder.h>
#endif /* _M68K_PAGE_H */

57
arch/m68k/include/asm/page_mm.h
View File

@ -1,29 +1,9 @@
#ifndef _M68K_PAGE_H #ifndef _M68K_PAGE_MM_H
#define _M68K_PAGE_H #define _M68K_PAGE_MM_H
#include <linux/const.h>
/* PAGE_SHIFT determines the page size */
#ifndef CONFIG_SUN3
#define PAGE_SHIFT (12)
#else
#define PAGE_SHIFT (13)
#endif
#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
#define PAGE_MASK (~(PAGE_SIZE-1))
#include <asm/setup.h>
#if PAGE_SHIFT < 13
#define THREAD_SIZE (8192)
#else
#define THREAD_SIZE PAGE_SIZE
#endif
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#include <linux/compiler.h> #include <linux/compiler.h>
#include <asm/module.h> #include <asm/module.h>
#define get_user_page(vaddr) __get_free_page(GFP_KERNEL) #define get_user_page(vaddr) __get_free_page(GFP_KERNEL)
@ -84,33 +64,6 @@ static inline void clear_page(void *page)
flush_dcache_page(page); \ flush_dcache_page(page); \
} while (0) } while (0)
/*
* These are used to make use of C type-checking..
*/
typedef struct { unsigned long pte; } pte_t;
typedef struct { unsigned long pmd[16]; } pmd_t;
typedef struct { unsigned long pgd; } pgd_t;
typedef struct { unsigned long pgprot; } pgprot_t;
typedef struct page *pgtable_t;
#define pte_val(x) ((x).pte)
#define pmd_val(x) ((&x)->pmd[0])
#define pgd_val(x) ((x).pgd)
#define pgprot_val(x) ((x).pgprot)
#define __pte(x) ((pte_t) { (x) } )
#define __pmd(x) ((pmd_t) { (x) } )
#define __pgd(x) ((pgd_t) { (x) } )
#define __pgprot(x) ((pgprot_t) { (x) } )
#endif /* !__ASSEMBLY__ */
#include <asm/page_offset.h>
#define PAGE_OFFSET (PAGE_OFFSET_RAW)
#ifndef __ASSEMBLY__
extern unsigned long m68k_memoffset; extern unsigned long m68k_memoffset;
#ifndef CONFIG_SUN3 #ifndef CONFIG_SUN3
@ -127,7 +80,7 @@ static inline unsigned long ___pa(void *vaddr)
: "0" (vaddr), "i" (m68k_fixup_memoffset)); : "0" (vaddr), "i" (m68k_fixup_memoffset));
return paddr; return paddr;
} }
#define __pa(vaddr) ___pa((void *)(vaddr)) #define __pa(vaddr) ___pa((void *)(long)(vaddr))
static inline void *__va(unsigned long paddr) static inline void *__va(unsigned long paddr)
{ {
void *vaddr; void *vaddr;
@ -223,6 +176,4 @@ static inline __attribute_const__ int __virt_to_node_shift(void)
#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
#include <asm-generic/getorder.h> #endif /* _M68K_PAGE_MM_H */
#endif /* _M68K_PAGE_H */

51
arch/m68k/include/asm/page_no.h
View File

@ -1,18 +1,11 @@
#ifndef _M68KNOMMU_PAGE_H #ifndef _M68K_PAGE_NO_H
#define _M68KNOMMU_PAGE_H #define _M68K_PAGE_NO_H
#include <linux/const.h>
/* PAGE_SHIFT determines the page size */
#define PAGE_SHIFT (12)
#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
#define PAGE_MASK (~(PAGE_SIZE-1))
#include <asm/setup.h>
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
extern unsigned long memory_start;
extern unsigned long memory_end;
#define get_user_page(vaddr) __get_free_page(GFP_KERNEL) #define get_user_page(vaddr) __get_free_page(GFP_KERNEL)
#define free_user_page(page, addr) free_page(addr) #define free_user_page(page, addr) free_page(addr)
@ -26,36 +19,6 @@
alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr) alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE #define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
/*
* These are used to make use of C type-checking..
*/
typedef struct { unsigned long pte; } pte_t;
typedef struct { unsigned long pmd[16]; } pmd_t;
typedef struct { unsigned long pgd; } pgd_t;
typedef struct { unsigned long pgprot; } pgprot_t;
typedef struct page *pgtable_t;
#define pte_val(x) ((x).pte)
#define pmd_val(x) ((&x)->pmd[0])
#define pgd_val(x) ((x).pgd)
#define pgprot_val(x) ((x).pgprot)
#define __pte(x) ((pte_t) { (x) } )
#define __pmd(x) ((pmd_t) { (x) } )
#define __pgd(x) ((pgd_t) { (x) } )
#define __pgprot(x) ((pgprot_t) { (x) } )
extern unsigned long memory_start;
extern unsigned long memory_end;
#endif /* !__ASSEMBLY__ */
#include <asm/page_offset.h>
#define PAGE_OFFSET (PAGE_OFFSET_RAW)
#ifndef __ASSEMBLY__
#define __pa(vaddr) ((unsigned long)(vaddr)) #define __pa(vaddr) ((unsigned long)(vaddr))
#define __va(paddr) ((void *)(paddr)) #define __va(paddr) ((void *)(paddr))
@ -74,6 +37,4 @@ extern unsigned long memory_end;
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */
#include <asm-generic/getorder.h> #endif /* _M68K_PAGE_NO_H */
#endif /* _M68KNOMMU_PAGE_H */

134
arch/m68k/include/asm/string.h
View File

@ -1,5 +1,133 @@
#ifdef __uClinux__ #ifndef _M68K_STRING_H_
#include "string_no.h" #define _M68K_STRING_H_
#include <linux/types.h>
#include <linux/compiler.h>
static inline size_t __kernel_strlen(const char *s)
{
const char *sc;
for (sc = s; *sc++; )
;
return sc - s - 1;
}
static inline char *__kernel_strcpy(char *dest, const char *src)
{
char *xdest = dest;
asm volatile ("\n"
"1: move.b (%1)+,(%0)+\n"
" jne 1b"
: "+a" (dest), "+a" (src)
: : "memory");
return xdest;
}
#ifndef __IN_STRING_C
#define __HAVE_ARCH_STRLEN
#define strlen(s) (__builtin_constant_p(s) ? \
__builtin_strlen(s) : \
__kernel_strlen(s))
#define __HAVE_ARCH_STRNLEN
static inline size_t strnlen(const char *s, size_t count)
{
const char *sc = s;
asm volatile ("\n"
"1: subq.l #1,%1\n"
" jcs 2f\n"
" tst.b (%0)+\n"
" jne 1b\n"
" subq.l #1,%0\n"
"2:"
: "+a" (sc), "+d" (count));
return sc - s;
}
#define __HAVE_ARCH_STRCPY
#if __GNUC__ >= 4
#define strcpy(d, s) (__builtin_constant_p(s) && \
__builtin_strlen(s) <= 32 ? \
__builtin_strcpy(d, s) : \
__kernel_strcpy(d, s))
#else #else
#include "string_mm.h" #define strcpy(d, s) __kernel_strcpy(d, s)
#endif #endif
#define __HAVE_ARCH_STRNCPY
static inline char *strncpy(char *dest, const char *src, size_t n)
{
char *xdest = dest;
asm volatile ("\n"
" jra 2f\n"
"1: move.b (%1),(%0)+\n"
" jeq 2f\n"
" addq.l #1,%1\n"
"2: subq.l #1,%2\n"
" jcc 1b\n"
: "+a" (dest), "+a" (src), "+d" (n)
: : "memory");
return xdest;
}
#define __HAVE_ARCH_STRCAT
#define strcat(d, s) ({ \
char *__d = (d); \
strcpy(__d + strlen(__d), (s)); \
})
#define __HAVE_ARCH_STRCHR
static inline char *strchr(const char *s, int c)
{
char sc, ch = c;
for (; (sc = *s++) != ch; ) {
if (!sc)
return NULL;
}
return (char *)s - 1;
}
#ifndef CONFIG_COLDFIRE
#define __HAVE_ARCH_STRCMP
static inline int strcmp(const char *cs, const char *ct)
{
char res;
asm ("\n"
"1: move.b (%0)+,%2\n" /* get *cs */
" cmp.b (%1)+,%2\n" /* compare a byte */
" jne 2f\n" /* not equal, break out */
" tst.b %2\n" /* at end of cs? */
" jne 1b\n" /* no, keep going */
" jra 3f\n" /* strings are equal */
"2: sub.b -(%1),%2\n" /* *cs - *ct */
"3:"
: "+a" (cs), "+a" (ct), "=d" (res));
return res;
}
#define __HAVE_ARCH_MEMMOVE
extern void *memmove(void *, const void *, __kernel_size_t);
#define __HAVE_ARCH_MEMCMP
extern int memcmp(const void *, const void *, __kernel_size_t);
#define memcmp(d, s, n) __builtin_memcmp(d, s, n)
#endif /* CONFIG_COLDFIRE */
#define __HAVE_ARCH_MEMSET
extern void *memset(void *, int, __kernel_size_t);
#define memset(d, c, n) __builtin_memset(d, c, n)
#define __HAVE_ARCH_MEMCPY
extern void *memcpy(void *, const void *, __kernel_size_t);
#define memcpy(d, s, n) __builtin_memcpy(d, s, n)
#endif
#endif /* _M68K_STRING_H_ */

131
arch/m68k/include/asm/string_mm.h
View File

@ -1,131 +0,0 @@
#ifndef _M68K_STRING_H_
#define _M68K_STRING_H_
#include <linux/types.h>
#include <linux/compiler.h>
static inline size_t __kernel_strlen(const char *s)
{
const char *sc;
for (sc = s; *sc++; )
;
return sc - s - 1;
}
static inline char *__kernel_strcpy(char *dest, const char *src)
{
char *xdest = dest;
asm volatile ("\n"
"1: move.b (%1)+,(%0)+\n"
" jne 1b"
: "+a" (dest), "+a" (src)
: : "memory");
return xdest;
}
#ifndef __IN_STRING_C
#define __HAVE_ARCH_STRLEN
#define strlen(s) (__builtin_constant_p(s) ? \
__builtin_strlen(s) : \
__kernel_strlen(s))
#define __HAVE_ARCH_STRNLEN
static inline size_t strnlen(const char *s, size_t count)
{
const char *sc = s;
asm volatile ("\n"
"1: subq.l #1,%1\n"
" jcs 2f\n"
" tst.b (%0)+\n"
" jne 1b\n"
" subq.l #1,%0\n"
"2:"
: "+a" (sc), "+d" (count));
return sc - s;
}
#define __HAVE_ARCH_STRCPY
#if __GNUC__ >= 4
#define strcpy(d, s) (__builtin_constant_p(s) && \
__builtin_strlen(s) <= 32 ? \
__builtin_strcpy(d, s) : \
__kernel_strcpy(d, s))
#else
#define strcpy(d, s) __kernel_strcpy(d, s)
#endif
#define __HAVE_ARCH_STRNCPY
static inline char *strncpy(char *dest, const char *src, size_t n)
{
char *xdest = dest;
asm volatile ("\n"
" jra 2f\n"
"1: move.b (%1),(%0)+\n"
" jeq 2f\n"
" addq.l #1,%1\n"
"2: subq.l #1,%2\n"
" jcc 1b\n"
: "+a" (dest), "+a" (src), "+d" (n)
: : "memory");
return xdest;
}
#define __HAVE_ARCH_STRCAT
#define strcat(d, s) ({ \
char *__d = (d); \
strcpy(__d + strlen(__d), (s)); \
})
#define __HAVE_ARCH_STRCHR
static inline char *strchr(const char *s, int c)
{
char sc, ch = c;
for (; (sc = *s++) != ch; ) {
if (!sc)
return NULL;
}
return (char *)s - 1;
}
#define __HAVE_ARCH_STRCMP
static inline int strcmp(const char *cs, const char *ct)
{
char res;
asm ("\n"
"1: move.b (%0)+,%2\n" /* get *cs */
" cmp.b (%1)+,%2\n" /* compare a byte */
" jne 2f\n" /* not equal, break out */
" tst.b %2\n" /* at end of cs? */
" jne 1b\n" /* no, keep going */
" jra 3f\n" /* strings are equal */
"2: sub.b -(%1),%2\n" /* *cs - *ct */
"3:"
: "+a" (cs), "+a" (ct), "=d" (res));
return res;
}
#define __HAVE_ARCH_MEMSET
extern void *memset(void *, int, __kernel_size_t);
#define memset(d, c, n) __builtin_memset(d, c, n)
#define __HAVE_ARCH_MEMCPY
extern void *memcpy(void *, const void *, __kernel_size_t);
#define memcpy(d, s, n) __builtin_memcpy(d, s, n)
#define __HAVE_ARCH_MEMMOVE
extern void *memmove(void *, const void *, __kernel_size_t);
#define __HAVE_ARCH_MEMCMP
extern int memcmp(const void *, const void *, __kernel_size_t);
#define memcmp(d, s, n) __builtin_memcmp(d, s, n)
#endif
#endif /* _M68K_STRING_H_ */

126
arch/m68k/include/asm/string_no.h
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@ -1,126 +0,0 @@
#ifndef _M68KNOMMU_STRING_H_
#define _M68KNOMMU_STRING_H_
#ifdef __KERNEL__ /* only set these up for kernel code */
#include <asm/setup.h>
#include <asm/page.h>
#define __HAVE_ARCH_STRCPY
static inline char * strcpy(char * dest,const char *src)
{
char *xdest = dest;
__asm__ __volatile__
("1:\tmoveb %1@+,%0@+\n\t"
"jne 1b"
: "=a" (dest), "=a" (src)
: "0" (dest), "1" (src) : "memory");
return xdest;
}
#define __HAVE_ARCH_STRNCPY
static inline char * strncpy(char *dest, const char *src, size_t n)
{
char *xdest = dest;
if (n == 0)
return xdest;
__asm__ __volatile__
("1:\tmoveb %1@+,%0@+\n\t"
"jeq 2f\n\t"
"subql #1,%2\n\t"
"jne 1b\n\t"
"2:"
: "=a" (dest), "=a" (src), "=d" (n)
: "0" (dest), "1" (src), "2" (n)
: "memory");
return xdest;
}
#ifndef CONFIG_COLDFIRE
#define __HAVE_ARCH_STRCMP
static inline int strcmp(const char * cs,const char * ct)
{
char __res;
__asm__
("1:\tmoveb %0@+,%2\n\t" /* get *cs */
"cmpb %1@+,%2\n\t" /* compare a byte */
"jne 2f\n\t" /* not equal, break out */
"tstb %2\n\t" /* at end of cs? */
"jne 1b\n\t" /* no, keep going */
"jra 3f\n\t" /* strings are equal */
"2:\tsubb %1@-,%2\n\t" /* *cs - *ct */
"3:"
: "=a" (cs), "=a" (ct), "=d" (__res)
: "0" (cs), "1" (ct));
return __res;
}
#define __HAVE_ARCH_STRNCMP
static inline int strncmp(const char * cs,const char * ct,size_t count)
{
char __res;
if (!count)
return 0;
__asm__
("1:\tmovb %0@+,%3\n\t" /* get *cs */
"cmpb %1@+,%3\n\t" /* compare a byte */
"jne 3f\n\t" /* not equal, break out */
"tstb %3\n\t" /* at end of cs? */
"jeq 4f\n\t" /* yes, all done */
"subql #1,%2\n\t" /* no, adjust count */
"jne 1b\n\t" /* more to do, keep going */
"2:\tmoveq #0,%3\n\t" /* strings are equal */
"jra 4f\n\t"
"3:\tsubb %1@-,%3\n\t" /* *cs - *ct */
"4:"
: "=a" (cs), "=a" (ct), "=d" (count), "=d" (__res)
: "0" (cs), "1" (ct), "2" (count));
return __res;
}
#endif /* CONFIG_COLDFIRE */
#define __HAVE_ARCH_MEMSET
extern void * memset(void * s, int c, size_t count);
#define __HAVE_ARCH_MEMCPY
extern void * memcpy(void *d, const void *s, size_t count);
#else /* KERNEL */
/*
* let user libraries deal with these,
* IMHO the kernel has no place defining these functions for user apps
*/
#define __HAVE_ARCH_STRCPY 1
#define __HAVE_ARCH_STRNCPY 1
#define __HAVE_ARCH_STRCAT 1
#define __HAVE_ARCH_STRNCAT 1
#define __HAVE_ARCH_STRCMP 1
#define __HAVE_ARCH_STRNCMP 1
#define __HAVE_ARCH_STRNICMP 1
#define __HAVE_ARCH_STRCHR 1
#define __HAVE_ARCH_STRRCHR 1
#define __HAVE_ARCH_STRSTR 1
#define __HAVE_ARCH_STRLEN 1
#define __HAVE_ARCH_STRNLEN 1
#define __HAVE_ARCH_MEMSET 1
#define __HAVE_ARCH_MEMCPY 1
#define __HAVE_ARCH_MEMMOVE 1
#define __HAVE_ARCH_MEMSCAN 1
#define __HAVE_ARCH_MEMCMP 1
#define __HAVE_ARCH_MEMCHR 1
#define __HAVE_ARCH_STRTOK 1
#endif /* KERNEL */
#endif /* _M68K_STRING_H_ */

2
arch/m68k/include/asm/system_mm.h
View File

@ -182,9 +182,7 @@ static inline unsigned long __cmpxchg(volatile void *p, unsigned long old,
((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\ ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
(unsigned long)(n), sizeof(*(ptr)))) (unsigned long)(n), sizeof(*(ptr))))
#ifndef CONFIG_SMP
#include <asm-generic/cmpxchg.h> #include <asm-generic/cmpxchg.h>
#endif
#endif #endif

9
arch/m68k/include/asm/system_no.h
View File

@ -59,17 +59,10 @@ asmlinkage void resume(void);
#define wmb() asm volatile ("" : : :"memory") #define wmb() asm volatile ("" : : :"memory")
#define set_mb(var, value) ({ (var) = (value); wmb(); }) #define set_mb(var, value) ({ (var) = (value); wmb(); })
#ifdef CONFIG_SMP
#define smp_mb() mb()
#define smp_rmb() rmb()
#define smp_wmb() wmb()
#define smp_read_barrier_depends() read_barrier_depends()
#else
#define smp_mb() barrier() #define smp_mb() barrier()
#define smp_rmb() barrier() #define smp_rmb() barrier()
#define smp_wmb() barrier() #define smp_wmb() barrier()
#define smp_read_barrier_depends() do { } while(0) #define smp_read_barrier_depends() do { } while(0)
#endif
#define read_barrier_depends() ((void)0) #define read_barrier_depends() ((void)0)
@ -152,9 +145,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
(unsigned long)(n), sizeof(*(ptr)))) (unsigned long)(n), sizeof(*(ptr))))
#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
#ifndef CONFIG_SMP
#include <asm-generic/cmpxchg.h> #include <asm-generic/cmpxchg.h>
#endif
#define arch_align_stack(x) (x) #define arch_align_stack(x) (x)

109
arch/m68k/include/asm/thread_info.h
View File

@ -1,5 +1,108 @@
#ifdef __uClinux__ #ifndef _ASM_M68K_THREAD_INFO_H
#include "thread_info_no.h" #define _ASM_M68K_THREAD_INFO_H
#include <asm/types.h>
#include <asm/page.h>
/*
* On machines with 4k pages we default to an 8k thread size, though we
* allow a 4k with config option. Any other machine page size then
* the thread size must match the page size (which is 8k and larger here).
*/
#if PAGE_SHIFT < 13
#ifdef CONFIG_4KSTACKS
#define THREAD_SIZE 4096
#else #else
#include "thread_info_mm.h" #define THREAD_SIZE 8192
#endif #endif
#else
#define THREAD_SIZE PAGE_SIZE
#endif
#define THREAD_SIZE_ORDER ((THREAD_SIZE / PAGE_SIZE) - 1)
#ifndef __ASSEMBLY__
struct thread_info {
struct task_struct *task; /* main task structure */
unsigned long flags;
struct exec_domain *exec_domain; /* execution domain */
int preempt_count; /* 0 => preemptable, <0 => BUG */
__u32 cpu; /* should always be 0 on m68k */
unsigned long tp_value; /* thread pointer */
struct restart_block restart_block;
};
#endif /* __ASSEMBLY__ */
#define PREEMPT_ACTIVE 0x4000000
#define INIT_THREAD_INFO(tsk) \
{ \
.task = &tsk, \
.exec_domain = &default_exec_domain, \
.preempt_count = INIT_PREEMPT_COUNT, \
.restart_block = { \
.fn = do_no_restart_syscall, \
}, \
}
#define init_stack (init_thread_union.stack)
#ifdef CONFIG_MMU
#ifndef __ASSEMBLY__
#include <asm/current.h>
#endif
#ifdef ASM_OFFSETS_C
#define task_thread_info(tsk) ((struct thread_info *) NULL)
#else
#include <asm/asm-offsets.h>
#define task_thread_info(tsk) ((struct thread_info *)((char *)tsk+TASK_TINFO))
#endif
#define init_thread_info (init_task.thread.info)
#define task_stack_page(tsk) ((tsk)->stack)
#define current_thread_info() task_thread_info(current)
#define __HAVE_THREAD_FUNCTIONS
#define setup_thread_stack(p, org) ({ \
*(struct task_struct **)(p)->stack = (p); \
task_thread_info(p)->task = (p); \
})
#define end_of_stack(p) ((unsigned long *)(p)->stack + 1)
#else /* !CONFIG_MMU */
#ifndef __ASSEMBLY__
/* how to get the thread information struct from C */
static inline struct thread_info *current_thread_info(void)
{
struct thread_info *ti;
__asm__(
"move.l %%sp, %0 \n\t"
"and.l %1, %0"
: "=&d"(ti)
: "di" (~(THREAD_SIZE-1))
);
return ti;
}
#endif
#define init_thread_info (init_thread_union.thread_info)
#endif /* CONFIG_MMU */
/* entry.S relies on these definitions!
* bits 0-7 are tested at every exception exit
* bits 8-15 are also tested at syscall exit
*/
#define TIF_SIGPENDING 6 /* signal pending */
#define TIF_NEED_RESCHED 7 /* rescheduling necessary */
#define TIF_DELAYED_TRACE 14 /* single step a syscall */
#define TIF_SYSCALL_TRACE 15 /* syscall trace active */
#define TIF_MEMDIE 16 /* is terminating due to OOM killer */
#define TIF_FREEZE 17 /* thread is freezing for suspend */
#endif /* _ASM_M68K_THREAD_INFO_H */

71
arch/m68k/include/asm/thread_info_mm.h
View File

@ -1,71 +0,0 @@
#ifndef _ASM_M68K_THREAD_INFO_H
#define _ASM_M68K_THREAD_INFO_H
#ifndef ASM_OFFSETS_C
#include <asm/asm-offsets.h>
#endif
#include <asm/types.h>
#include <asm/page.h>
#ifndef __ASSEMBLY__
#include <asm/current.h>
struct thread_info {
struct task_struct *task; /* main task structure */
unsigned long flags;
struct exec_domain *exec_domain; /* execution domain */
int preempt_count; /* 0 => preemptable, <0 => BUG */
__u32 cpu; /* should always be 0 on m68k */
unsigned long tp_value; /* thread pointer */
struct restart_block restart_block;
};
#endif /* __ASSEMBLY__ */
#define PREEMPT_ACTIVE 0x4000000
#define INIT_THREAD_INFO(tsk) \
{ \
.task = &tsk, \
.exec_domain = &default_exec_domain, \
.preempt_count = INIT_PREEMPT_COUNT, \
.restart_block = { \
.fn = do_no_restart_syscall, \
}, \
}
/* THREAD_SIZE should be 8k, so handle differently for 4k and 8k machines */
#define THREAD_SIZE_ORDER (13 - PAGE_SHIFT)
#define init_thread_info (init_task.thread.info)
#define init_stack (init_thread_union.stack)
#ifdef ASM_OFFSETS_C
#define task_thread_info(tsk) ((struct thread_info *) NULL)
#else
#define task_thread_info(tsk) ((struct thread_info *)((char *)tsk+TASK_TINFO))
#endif
#define task_stack_page(tsk) ((tsk)->stack)
#define current_thread_info() task_thread_info(current)
#define __HAVE_THREAD_FUNCTIONS
#define setup_thread_stack(p, org) ({ \
*(struct task_struct **)(p)->stack = (p); \
task_thread_info(p)->task = (p); \
})
#define end_of_stack(p) ((unsigned long *)(p)->stack + 1)
/* entry.S relies on these definitions!
* bits 0-7 are tested at every exception exit
* bits 8-15 are also tested at syscall exit
*/
#define TIF_SIGPENDING 6 /* signal pending */
#define TIF_NEED_RESCHED 7 /* rescheduling necessary */
#define TIF_DELAYED_TRACE 14 /* single step a syscall */
#define TIF_SYSCALL_TRACE 15 /* syscall trace active */
#define TIF_MEMDIE 16 /* is terminating due to OOM killer */
#define TIF_FREEZE 17 /* thread is freezing for suspend */
#endif /* _ASM_M68K_THREAD_INFO_H */

102
arch/m68k/include/asm/thread_info_no.h
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@ -1,102 +0,0 @@
/* thread_info.h: m68knommu low-level thread information
* adapted from the i386 and PPC versions by Greg Ungerer (gerg@snapgear.com)
*
* Copyright (C) 2002 David Howells (dhowells@redhat.com)
* - Incorporating suggestions made by Linus Torvalds and Dave Miller
*/
#ifndef _ASM_THREAD_INFO_H
#define _ASM_THREAD_INFO_H
#include <asm/page.h>
#ifdef __KERNEL__
/*
* Size of kernel stack for each process. This must be a power of 2...
*/
#ifdef CONFIG_4KSTACKS
#define THREAD_SIZE_ORDER (0)
#else
#define THREAD_SIZE_ORDER (1)
#endif
/*
* for asm files, THREAD_SIZE is now generated by asm-offsets.c
*/
#define THREAD_SIZE (PAGE_SIZE<<THREAD_SIZE_ORDER)
#ifndef __ASSEMBLY__
/*
* low level task data.
*/
struct thread_info {
struct task_struct *task; /* main task structure */
struct exec_domain *exec_domain; /* execution domain */
unsigned long flags; /* low level flags */
int cpu; /* cpu we're on */
int preempt_count; /* 0 => preemptable, <0 => BUG */
unsigned long tp_value; /* thread pointer */
struct restart_block restart_block;
};
/*
* macros/functions for gaining access to the thread information structure
*/
#define INIT_THREAD_INFO(tsk) \
{ \
.task = &tsk, \
.exec_domain = &default_exec_domain, \
.flags = 0, \
.cpu = 0, \
.preempt_count = INIT_PREEMPT_COUNT, \
.restart_block = { \
.fn = do_no_restart_syscall, \
}, \
}
#define init_thread_info (init_thread_union.thread_info)
#define init_stack (init_thread_union.stack)
/* how to get the thread information struct from C */
static inline struct thread_info *current_thread_info(void)
{
struct thread_info *ti;
__asm__(
"move.l %%sp, %0 \n\t"
"and.l %1, %0"
: "=&d"(ti)
: "di" (~(THREAD_SIZE-1))
);
return ti;
}
#endif /* __ASSEMBLY__ */
#define PREEMPT_ACTIVE 0x4000000
/*
* thread information flag bit numbers
*/
#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
#define TIF_SIGPENDING 1 /* signal pending */
#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
#define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling
TIF_NEED_RESCHED */
#define TIF_MEMDIE 4 /* is terminating due to OOM killer */
#define TIF_FREEZE 16 /* is freezing for suspend */
/* as above, but as bit values */
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
#define _TIF_FREEZE (1<<TIF_FREEZE)
#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
#endif /* __KERNEL__ */
#endif /* _ASM_THREAD_INFO_H */

275
arch/m68k/include/asm/traps.h
View File

@ -1,5 +1,272 @@
#ifdef __uClinux__ /*
#include "traps_no.h" * linux/include/asm/traps.h
#else *
#include "traps_mm.h" * Copyright (C) 1993 Hamish Macdonald
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
*/
#ifndef _M68K_TRAPS_H
#define _M68K_TRAPS_H
#ifndef __ASSEMBLY__
#include <linux/linkage.h>
#include <asm/ptrace.h>
typedef void (*e_vector)(void);
extern e_vector vectors[];
asmlinkage void auto_inthandler(void);
asmlinkage void user_inthandler(void);
asmlinkage void bad_inthandler(void);
extern void init_vectors(void);
#endif #endif
#define VEC_RESETSP (0)
#define VEC_RESETPC (1)
#define VEC_BUSERR (2)
#define VEC_ADDRERR (3)
#define VEC_ILLEGAL (4)
#define VEC_ZERODIV (5)
#define VEC_CHK (6)
#define VEC_TRAP (7)
#define VEC_PRIV (8)
#define VEC_TRACE (9)
#define VEC_LINE10 (10)
#define VEC_LINE11 (11)
#define VEC_RESV12 (12)
#define VEC_COPROC (13)
#define VEC_FORMAT (14)
#define VEC_UNINT (15)
#define VEC_RESV16 (16)
#define VEC_RESV17 (17)
#define VEC_RESV18 (18)
#define VEC_RESV19 (19)
#define VEC_RESV20 (20)
#define VEC_RESV21 (21)
#define VEC_RESV22 (22)
#define VEC_RESV23 (23)
#define VEC_SPUR (24)
#define VEC_INT1 (25)
#define VEC_INT2 (26)
#define VEC_INT3 (27)
#define VEC_INT4 (28)
#define VEC_INT5 (29)
#define VEC_INT6 (30)
#define VEC_INT7 (31)
#define VEC_SYS (32)
#define VEC_TRAP1 (33)
#define VEC_TRAP2 (34)
#define VEC_TRAP3 (35)
#define VEC_TRAP4 (36)
#define VEC_TRAP5 (37)
#define VEC_TRAP6 (38)
#define VEC_TRAP7 (39)
#define VEC_TRAP8 (40)
#define VEC_TRAP9 (41)
#define VEC_TRAP10 (42)
#define VEC_TRAP11 (43)
#define VEC_TRAP12 (44)
#define VEC_TRAP13 (45)
#define VEC_TRAP14 (46)
#define VEC_TRAP15 (47)
#define VEC_FPBRUC (48)
#define VEC_FPIR (49)
#define VEC_FPDIVZ (50)
#define VEC_FPUNDER (51)
#define VEC_FPOE (52)
#define VEC_FPOVER (53)
#define VEC_FPNAN (54)
#define VEC_FPUNSUP (55)
#define VEC_MMUCFG (56)
#define VEC_MMUILL (57)
#define VEC_MMUACC (58)
#define VEC_RESV59 (59)
#define VEC_UNIMPEA (60)
#define VEC_UNIMPII (61)
#define VEC_RESV62 (62)
#define VEC_RESV63 (63)
#define VEC_USER (64)
#define VECOFF(vec) ((vec)<<2)
#ifndef __ASSEMBLY__
/* Status register bits */
#define PS_T (0x8000)
#define PS_S (0x2000)
#define PS_M (0x1000)
#define PS_C (0x0001)
/* bits for 68020/68030 special status word */
#define FC (0x8000)
#define FB (0x4000)
#define RC (0x2000)
#define RB (0x1000)
#define DF (0x0100)
#define RM (0x0080)
#define RW (0x0040)
#define SZ (0x0030)
#define DFC (0x0007)
/* bits for 68030 MMU status register (mmusr,psr) */
#define MMU_B (0x8000) /* bus error */
#define MMU_L (0x4000) /* limit violation */
#define MMU_S (0x2000) /* supervisor violation */
#define MMU_WP (0x0800) /* write-protected */
#define MMU_I (0x0400) /* invalid descriptor */
#define MMU_M (0x0200) /* ATC entry modified */
#define MMU_T (0x0040) /* transparent translation */
#define MMU_NUM (0x0007) /* number of levels traversed */
/* bits for 68040 special status word */
#define CP_040 (0x8000)
#define CU_040 (0x4000)
#define CT_040 (0x2000)
#define CM_040 (0x1000)
#define MA_040 (0x0800)
#define ATC_040 (0x0400)
#define LK_040 (0x0200)
#define RW_040 (0x0100)
#define SIZ_040 (0x0060)
#define TT_040 (0x0018)
#define TM_040 (0x0007)
/* bits for 68040 write back status word */
#define WBV_040 (0x80)
#define WBSIZ_040 (0x60)
#define WBBYT_040 (0x20)
#define WBWRD_040 (0x40)
#define WBLNG_040 (0x00)
#define WBTT_040 (0x18)
#define WBTM_040 (0x07)
/* bus access size codes */
#define BA_SIZE_BYTE (0x20)
#define BA_SIZE_WORD (0x40)
#define BA_SIZE_LONG (0x00)
#define BA_SIZE_LINE (0x60)
/* bus access transfer type codes */
#define BA_TT_MOVE16 (0x08)
/* bits for 68040 MMU status register (mmusr) */
#define MMU_B_040 (0x0800)
#define MMU_G_040 (0x0400)
#define MMU_S_040 (0x0080)
#define MMU_CM_040 (0x0060)
#define MMU_M_040 (0x0010)
#define MMU_WP_040 (0x0004)
#define MMU_T_040 (0x0002)
#define MMU_R_040 (0x0001)
/* bits in the 68060 fault status long word (FSLW) */
#define MMU060_MA (0x08000000) /* misaligned */
#define MMU060_LK (0x02000000) /* locked transfer */
#define MMU060_RW (0x01800000) /* read/write */
# define MMU060_RW_W (0x00800000) /* write */
# define MMU060_RW_R (0x01000000) /* read */
# define MMU060_RW_RMW (0x01800000) /* read/modify/write */
# define MMU060_W (0x00800000) /* general write, includes rmw */
#define MMU060_SIZ (0x00600000) /* transfer size */
#define MMU060_TT (0x00180000) /* transfer type (TT) bits */
#define MMU060_TM (0x00070000) /* transfer modifier (TM) bits */
#define MMU060_IO (0x00008000) /* instruction or operand */
#define MMU060_PBE (0x00004000) /* push buffer bus error */
#define MMU060_SBE (0x00002000) /* store buffer bus error */
#define MMU060_PTA (0x00001000) /* pointer A fault */
#define MMU060_PTB (0x00000800) /* pointer B fault */
#define MMU060_IL (0x00000400) /* double indirect descr fault */
#define MMU060_PF (0x00000200) /* page fault (invalid descr) */
#define MMU060_SP (0x00000100) /* supervisor protection */
#define MMU060_WP (0x00000080) /* write protection */
#define MMU060_TWE (0x00000040) /* bus error on table search */
#define MMU060_RE (0x00000020) /* bus error on read */
#define MMU060_WE (0x00000010) /* bus error on write */
#define MMU060_TTR (0x00000008) /* error caused by TTR translation */
#define MMU060_BPE (0x00000004) /* branch prediction error */
#define MMU060_SEE (0x00000001) /* software emulated error */
/* cases of missing or invalid descriptors */
#define MMU060_DESC_ERR (MMU060_PTA | MMU060_PTB | \
MMU060_IL | MMU060_PF)
/* bits that indicate real errors */
#define MMU060_ERR_BITS (MMU060_PBE | MMU060_SBE | MMU060_DESC_ERR | MMU060_SP | \
MMU060_WP | MMU060_TWE | MMU060_RE | MMU060_WE)
/* structure for stack frames */
struct frame {
struct pt_regs ptregs;
union {
struct {
unsigned long iaddr; /* instruction address */
} fmt2;
struct {
unsigned long effaddr; /* effective address */
} fmt3;
struct {
unsigned long effaddr; /* effective address */
unsigned long pc; /* pc of faulted instr */
} fmt4;
struct {
unsigned long effaddr; /* effective address */
unsigned short ssw; /* special status word */
unsigned short wb3s; /* write back 3 status */
unsigned short wb2s; /* write back 2 status */
unsigned short wb1s; /* write back 1 status */
unsigned long faddr; /* fault address */
unsigned long wb3a; /* write back 3 address */
unsigned long wb3d; /* write back 3 data */
unsigned long wb2a; /* write back 2 address */
unsigned long wb2d; /* write back 2 data */
unsigned long wb1a; /* write back 1 address */
unsigned long wb1dpd0; /* write back 1 data/push data 0*/
unsigned long pd1; /* push data 1*/
unsigned long pd2; /* push data 2*/
unsigned long pd3; /* push data 3*/
} fmt7;
struct {
unsigned long iaddr; /* instruction address */
unsigned short int1[4]; /* internal registers */
} fmt9;
struct {
unsigned short int1;
unsigned short ssw; /* special status word */
unsigned short isc; /* instruction stage c */
unsigned short isb; /* instruction stage b */
unsigned long daddr; /* data cycle fault address */
unsigned short int2[2];
unsigned long dobuf; /* data cycle output buffer */
unsigned short int3[2];
} fmta;
struct {
unsigned short int1;
unsigned short ssw; /* special status word */
unsigned short isc; /* instruction stage c */
unsigned short isb; /* instruction stage b */
unsigned long daddr; /* data cycle fault address */
unsigned short int2[2];
unsigned long dobuf; /* data cycle output buffer */
unsigned short int3[4];
unsigned long baddr; /* stage B address */
unsigned short int4[2];
unsigned long dibuf; /* data cycle input buffer */
unsigned short int5[3];
unsigned ver : 4; /* stack frame version # */
unsigned int6:12;
unsigned short int7[18];
} fmtb;
} un;
};
#endif /* __ASSEMBLY__ */
#endif /* _M68K_TRAPS_H */

272
arch/m68k/include/asm/traps_mm.h
View File

@ -1,272 +0,0 @@
/*
* linux/include/asm/traps.h
*
* Copyright (C) 1993 Hamish Macdonald
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
*/
#ifndef _M68K_TRAPS_H
#define _M68K_TRAPS_H
#ifndef __ASSEMBLY__
#include <linux/linkage.h>
#include <asm/ptrace.h>
typedef void (*e_vector)(void);
asmlinkage void auto_inthandler(void);
asmlinkage void user_inthandler(void);
asmlinkage void bad_inthandler(void);
extern e_vector vectors[];
#endif
#define VEC_RESETSP (0)
#define VEC_RESETPC (1)
#define VEC_BUSERR (2)
#define VEC_ADDRERR (3)
#define VEC_ILLEGAL (4)
#define VEC_ZERODIV (5)
#define VEC_CHK (6)
#define VEC_TRAP (7)
#define VEC_PRIV (8)
#define VEC_TRACE (9)
#define VEC_LINE10 (10)
#define VEC_LINE11 (11)
#define VEC_RESV12 (12)
#define VEC_COPROC (13)
#define VEC_FORMAT (14)
#define VEC_UNINT (15)
#define VEC_RESV16 (16)
#define VEC_RESV17 (17)
#define VEC_RESV18 (18)
#define VEC_RESV19 (19)
#define VEC_RESV20 (20)
#define VEC_RESV21 (21)
#define VEC_RESV22 (22)
#define VEC_RESV23 (23)
#define VEC_SPUR (24)
#define VEC_INT1 (25)
#define VEC_INT2 (26)
#define VEC_INT3 (27)
#define VEC_INT4 (28)
#define VEC_INT5 (29)
#define VEC_INT6 (30)
#define VEC_INT7 (31)
#define VEC_SYS (32)
#define VEC_TRAP1 (33)
#define VEC_TRAP2 (34)
#define VEC_TRAP3 (35)
#define VEC_TRAP4 (36)
#define VEC_TRAP5 (37)
#define VEC_TRAP6 (38)
#define VEC_TRAP7 (39)
#define VEC_TRAP8 (40)
#define VEC_TRAP9 (41)
#define VEC_TRAP10 (42)
#define VEC_TRAP11 (43)
#define VEC_TRAP12 (44)
#define VEC_TRAP13 (45)
#define VEC_TRAP14 (46)
#define VEC_TRAP15 (47)
#define VEC_FPBRUC (48)
#define VEC_FPIR (49)
#define VEC_FPDIVZ (50)
#define VEC_FPUNDER (51)
#define VEC_FPOE (52)
#define VEC_FPOVER (53)
#define VEC_FPNAN (54)
#define VEC_FPUNSUP (55)
#define VEC_MMUCFG (56)
#define VEC_MMUILL (57)
#define VEC_MMUACC (58)
#define VEC_RESV59 (59)
#define VEC_UNIMPEA (60)
#define VEC_UNIMPII (61)
#define VEC_RESV62 (62)
#define VEC_RESV63 (63)
#define VEC_USER (64)
#define VECOFF(vec) ((vec)<<2)
#ifndef __ASSEMBLY__
/* Status register bits */
#define PS_T (0x8000)
#define PS_S (0x2000)
#define PS_M (0x1000)
#define PS_C (0x0001)
/* bits for 68020/68030 special status word */
#define FC (0x8000)
#define FB (0x4000)
#define RC (0x2000)
#define RB (0x1000)
#define DF (0x0100)
#define RM (0x0080)
#define RW (0x0040)
#define SZ (0x0030)
#define DFC (0x0007)
/* bits for 68030 MMU status register (mmusr,psr) */
#define MMU_B (0x8000) /* bus error */
#define MMU_L (0x4000) /* limit violation */
#define MMU_S (0x2000) /* supervisor violation */
#define MMU_WP (0x0800) /* write-protected */
#define MMU_I (0x0400) /* invalid descriptor */
#define MMU_M (0x0200) /* ATC entry modified */
#define MMU_T (0x0040) /* transparent translation */
#define MMU_NUM (0x0007) /* number of levels traversed */
/* bits for 68040 special status word */
#define CP_040 (0x8000)
#define CU_040 (0x4000)
#define CT_040 (0x2000)
#define CM_040 (0x1000)
#define MA_040 (0x0800)
#define ATC_040 (0x0400)
#define LK_040 (0x0200)
#define RW_040 (0x0100)
#define SIZ_040 (0x0060)
#define TT_040 (0x0018)
#define TM_040 (0x0007)
/* bits for 68040 write back status word */
#define WBV_040 (0x80)
#define WBSIZ_040 (0x60)
#define WBBYT_040 (0x20)
#define WBWRD_040 (0x40)
#define WBLNG_040 (0x00)
#define WBTT_040 (0x18)
#define WBTM_040 (0x07)
/* bus access size codes */
#define BA_SIZE_BYTE (0x20)
#define BA_SIZE_WORD (0x40)
#define BA_SIZE_LONG (0x00)
#define BA_SIZE_LINE (0x60)
/* bus access transfer type codes */
#define BA_TT_MOVE16 (0x08)
/* bits for 68040 MMU status register (mmusr) */
#define MMU_B_040 (0x0800)
#define MMU_G_040 (0x0400)
#define MMU_S_040 (0x0080)
#define MMU_CM_040 (0x0060)
#define MMU_M_040 (0x0010)
#define MMU_WP_040 (0x0004)
#define MMU_T_040 (0x0002)
#define MMU_R_040 (0x0001)
/* bits in the 68060 fault status long word (FSLW) */
#define MMU060_MA (0x08000000) /* misaligned */
#define MMU060_LK (0x02000000) /* locked transfer */
#define MMU060_RW (0x01800000) /* read/write */
# define MMU060_RW_W (0x00800000) /* write */
# define MMU060_RW_R (0x01000000) /* read */
# define MMU060_RW_RMW (0x01800000) /* read/modify/write */
# define MMU060_W (0x00800000) /* general write, includes rmw */
#define MMU060_SIZ (0x00600000) /* transfer size */
#define MMU060_TT (0x00180000) /* transfer type (TT) bits */
#define MMU060_TM (0x00070000) /* transfer modifier (TM) bits */
#define MMU060_IO (0x00008000) /* instruction or operand */
#define MMU060_PBE (0x00004000) /* push buffer bus error */
#define MMU060_SBE (0x00002000) /* store buffer bus error */
#define MMU060_PTA (0x00001000) /* pointer A fault */
#define MMU060_PTB (0x00000800) /* pointer B fault */
#define MMU060_IL (0x00000400) /* double indirect descr fault */
#define MMU060_PF (0x00000200) /* page fault (invalid descr) */
#define MMU060_SP (0x00000100) /* supervisor protection */
#define MMU060_WP (0x00000080) /* write protection */
#define MMU060_TWE (0x00000040) /* bus error on table search */
#define MMU060_RE (0x00000020) /* bus error on read */
#define MMU060_WE (0x00000010) /* bus error on write */
#define MMU060_TTR (0x00000008) /* error caused by TTR translation */
#define MMU060_BPE (0x00000004) /* branch prediction error */
#define MMU060_SEE (0x00000001) /* software emulated error */
/* cases of missing or invalid descriptors */
#define MMU060_DESC_ERR (MMU060_PTA | MMU060_PTB | \
MMU060_IL | MMU060_PF)
/* bits that indicate real errors */
#define MMU060_ERR_BITS (MMU060_PBE | MMU060_SBE | MMU060_DESC_ERR | MMU060_SP | \
MMU060_WP | MMU060_TWE | MMU060_RE | MMU060_WE)
/* structure for stack frames */
struct frame {
struct pt_regs ptregs;
union {
struct {
unsigned long iaddr; /* instruction address */
} fmt2;
struct {
unsigned long effaddr; /* effective address */
} fmt3;
struct {
unsigned long effaddr; /* effective address */
unsigned long pc; /* pc of faulted instr */
} fmt4;
struct {
unsigned long effaddr; /* effective address */
unsigned short ssw; /* special status word */
unsigned short wb3s; /* write back 3 status */
unsigned short wb2s; /* write back 2 status */
unsigned short wb1s; /* write back 1 status */
unsigned long faddr; /* fault address */
unsigned long wb3a; /* write back 3 address */
unsigned long wb3d; /* write back 3 data */
unsigned long wb2a; /* write back 2 address */
unsigned long wb2d; /* write back 2 data */
unsigned long wb1a; /* write back 1 address */
unsigned long wb1dpd0; /* write back 1 data/push data 0*/
unsigned long pd1; /* push data 1*/
unsigned long pd2; /* push data 2*/
unsigned long pd3; /* push data 3*/
} fmt7;
struct {
unsigned long iaddr; /* instruction address */
unsigned short int1[4]; /* internal registers */
} fmt9;
struct {
unsigned short int1;
unsigned short ssw; /* special status word */
unsigned short isc; /* instruction stage c */
unsigned short isb; /* instruction stage b */
unsigned long daddr; /* data cycle fault address */
unsigned short int2[2];
unsigned long dobuf; /* data cycle output buffer */
unsigned short int3[2];
} fmta;
struct {
unsigned short int1;
unsigned short ssw; /* special status word */
unsigned short isc; /* instruction stage c */
unsigned short isb; /* instruction stage b */
unsigned long daddr; /* data cycle fault address */
unsigned short int2[2];
unsigned long dobuf; /* data cycle output buffer */
unsigned short int3[4];
unsigned long baddr; /* stage B address */
unsigned short int4[2];
unsigned long dibuf; /* data cycle input buffer */
unsigned short int5[3];
unsigned ver : 4; /* stack frame version # */
unsigned int6:12;
unsigned short int7[18];
} fmtb;
} un;
};
#endif /* __ASSEMBLY__ */
#endif /* _M68K_TRAPS_H */

154
arch/m68k/include/asm/traps_no.h
View File

@ -1,154 +0,0 @@
/*
* linux/include/asm/traps.h
*
* Copyright (C) 1993 Hamish Macdonald
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
*/
#ifndef _M68KNOMMU_TRAPS_H
#define _M68KNOMMU_TRAPS_H
#ifndef __ASSEMBLY__
typedef void (*e_vector)(void);
extern e_vector vectors[];
extern void init_vectors(void);
extern void enable_vector(unsigned int irq);
extern void disable_vector(unsigned int irq);
extern void ack_vector(unsigned int irq);
#endif
#define VEC_BUSERR (2)
#define VEC_ADDRERR (3)
#define VEC_ILLEGAL (4)
#define VEC_ZERODIV (5)
#define VEC_CHK (6)
#define VEC_TRAP (7)
#define VEC_PRIV (8)
#define VEC_TRACE (9)
#define VEC_LINE10 (10)
#define VEC_LINE11 (11)
#define VEC_RESV1 (12)
#define VEC_COPROC (13)
#define VEC_FORMAT (14)
#define VEC_UNINT (15)
#define VEC_SPUR (24)
#define VEC_INT1 (25)
#define VEC_INT2 (26)
#define VEC_INT3 (27)
#define VEC_INT4 (28)
#define VEC_INT5 (29)
#define VEC_INT6 (30)
#define VEC_INT7 (31)
#define VEC_SYS (32)
#define VEC_TRAP1 (33)
#define VEC_TRAP2 (34)
#define VEC_TRAP3 (35)
#define VEC_TRAP4 (36)
#define VEC_TRAP5 (37)
#define VEC_TRAP6 (38)
#define VEC_TRAP7 (39)
#define VEC_TRAP8 (40)
#define VEC_TRAP9 (41)
#define VEC_TRAP10 (42)
#define VEC_TRAP11 (43)
#define VEC_TRAP12 (44)
#define VEC_TRAP13 (45)
#define VEC_TRAP14 (46)
#define VEC_TRAP15 (47)
#define VEC_FPBRUC (48)
#define VEC_FPIR (49)
#define VEC_FPDIVZ (50)
#define VEC_FPUNDER (51)
#define VEC_FPOE (52)
#define VEC_FPOVER (53)
#define VEC_FPNAN (54)
#define VEC_FPUNSUP (55)
#define VEC_UNIMPEA (60)
#define VEC_UNIMPII (61)
#define VEC_USER (64)
#define VECOFF(vec) ((vec)<<2)
#ifndef __ASSEMBLY__
/* Status register bits */
#define PS_T (0x8000)
#define PS_S (0x2000)
#define PS_M (0x1000)
#define PS_C (0x0001)
/* structure for stack frames */
struct frame {
struct pt_regs ptregs;
union {
struct {
unsigned long iaddr; /* instruction address */
} fmt2;
struct {
unsigned long effaddr; /* effective address */
} fmt3;
struct {
unsigned long effaddr; /* effective address */
unsigned long pc; /* pc of faulted instr */
} fmt4;
struct {
unsigned long effaddr; /* effective address */
unsigned short ssw; /* special status word */
unsigned short wb3s; /* write back 3 status */
unsigned short wb2s; /* write back 2 status */
unsigned short wb1s; /* write back 1 status */
unsigned long faddr; /* fault address */
unsigned long wb3a; /* write back 3 address */
unsigned long wb3d; /* write back 3 data */
unsigned long wb2a; /* write back 2 address */
unsigned long wb2d; /* write back 2 data */
unsigned long wb1a; /* write back 1 address */
unsigned long wb1dpd0; /* write back 1 data/push data 0*/
unsigned long pd1; /* push data 1*/
unsigned long pd2; /* push data 2*/
unsigned long pd3; /* push data 3*/
} fmt7;
struct {
unsigned long iaddr; /* instruction address */
unsigned short int1[4]; /* internal registers */
} fmt9;
struct {
unsigned short int1;
unsigned short ssw; /* special status word */
unsigned short isc; /* instruction stage c */
unsigned short isb; /* instruction stage b */
unsigned long daddr; /* data cycle fault address */
unsigned short int2[2];
unsigned long dobuf; /* data cycle output buffer */
unsigned short int3[2];
} fmta;
struct {
unsigned short int1;
unsigned short ssw; /* special status word */
unsigned short isc; /* instruction stage c */
unsigned short isb; /* instruction stage b */
unsigned long daddr; /* data cycle fault address */
unsigned short int2[2];
unsigned long dobuf; /* data cycle output buffer */
unsigned short int3[4];
unsigned long baddr; /* stage B address */
unsigned short int4[2];
unsigned long dibuf; /* data cycle input buffer */
unsigned short int5[3];
unsigned ver : 4; /* stack frame version # */
unsigned int6:12;
unsigned short int7[18];
} fmtb;
} un;
};
#endif /* __ASSEMBLY__ */
#endif /* _M68KNOMMU_TRAPS_H */

6
arch/m68k/kernel/setup.c
View File

@ -359,12 +359,6 @@ void __init setup_arch(char **cmdline_p)
isa_type = ISA_TYPE_Q40; isa_type = ISA_TYPE_Q40;
isa_sex = 0; isa_sex = 0;
} }
#ifdef CONFIG_GG2
if (MACH_IS_AMIGA && AMIGAHW_PRESENT(GG2_ISA)) {
isa_type = ISA_TYPE_GG2;
isa_sex = 0;
}
#endif
#ifdef CONFIG_AMIGA_PCMCIA #ifdef CONFIG_AMIGA_PCMCIA
if (MACH_IS_AMIGA && AMIGAHW_PRESENT(PCMCIA)) { if (MACH_IS_AMIGA && AMIGAHW_PRESENT(PCMCIA)) {
isa_type = ISA_TYPE_AG; isa_type = ISA_TYPE_AG;

3
arch/m68k/kernel/sys_m68k.c
View File

@ -12,7 +12,6 @@
#include <linux/mm.h> #include <linux/mm.h>
#include <linux/fs.h> #include <linux/fs.h>
#include <linux/smp.h> #include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/sem.h> #include <linux/sem.h>
#include <linux/msg.h> #include <linux/msg.h>
#include <linux/shm.h> #include <linux/shm.h>
@ -377,7 +376,6 @@ sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
struct vm_area_struct *vma; struct vm_area_struct *vma;
int ret = -EINVAL; int ret = -EINVAL;
lock_kernel();
if (scope < FLUSH_SCOPE_LINE || scope > FLUSH_SCOPE_ALL || if (scope < FLUSH_SCOPE_LINE || scope > FLUSH_SCOPE_ALL ||
cache & ~FLUSH_CACHE_BOTH) cache & ~FLUSH_CACHE_BOTH)
goto out; goto out;
@ -446,7 +444,6 @@ sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
} }
} }
out: out:
unlock_kernel();
return ret; return ret;
} }

2
arch/m68k/kernel/time.c
View File

@ -42,9 +42,7 @@ static inline int set_rtc_mmss(unsigned long nowtime)
static irqreturn_t timer_interrupt(int irq, void *dummy) static irqreturn_t timer_interrupt(int irq, void *dummy)
{ {
do_timer(1); do_timer(1);
#ifndef CONFIG_SMP
update_process_times(user_mode(get_irq_regs())); update_process_times(user_mode(get_irq_regs()));
#endif
profile_tick(CPU_PROFILING); profile_tick(CPU_PROFILING);
#ifdef CONFIG_HEARTBEAT #ifdef CONFIG_HEARTBEAT

2
arch/m68k/sun3/sun3ints.c
View File

@ -67,9 +67,7 @@ static irqreturn_t sun3_int5(int irq, void *dev_id)
intersil_clear(); intersil_clear();
#endif #endif
do_timer(1); do_timer(1);
#ifndef CONFIG_SMP
update_process_times(user_mode(get_irq_regs())); update_process_times(user_mode(get_irq_regs()));
#endif
if (!(kstat_cpu(0).irqs[irq] % 20)) if (!(kstat_cpu(0).irqs[irq] % 20))
sun3_leds(led_pattern[(kstat_cpu(0).irqs[irq] % 160) / 20]); sun3_leds(led_pattern[(kstat_cpu(0).irqs[irq] % 160) / 20]);
return IRQ_HANDLED; return IRQ_HANDLED;

3
arch/m68knommu/kernel/time.c
View File

@ -50,9 +50,8 @@ irqreturn_t arch_timer_interrupt(int irq, void *dummy)
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);
#ifndef CONFIG_SMP
update_process_times(user_mode(get_irq_regs())); update_process_times(user_mode(get_irq_regs()));
#endif
return(IRQ_HANDLED); return(IRQ_HANDLED);
} }
#endif #endif

4
arch/m68knommu/platform/coldfire/entry.S
View File

@ -112,7 +112,7 @@ ret_from_exception:
andl #-THREAD_SIZE,%d1 /* at base of kernel stack */ andl #-THREAD_SIZE,%d1 /* at base of kernel stack */
movel %d1,%a0 movel %d1,%a0
movel %a0@(TI_FLAGS),%d1 /* get thread_info->flags */ movel %a0@(TI_FLAGS),%d1 /* get thread_info->flags */
andl #_TIF_NEED_RESCHED,%d1 andl #(1<<TIF_NEED_RESCHED),%d1
jeq Lkernel_return jeq Lkernel_return
movel %a0@(TI_PREEMPTCOUNT),%d1 movel %a0@(TI_PREEMPTCOUNT),%d1
@ -136,7 +136,7 @@ Luser_return:
andl #-THREAD_SIZE,%d1 /* at base of kernel stack */ andl #-THREAD_SIZE,%d1 /* at base of kernel stack */
movel %d1,%a0 movel %d1,%a0
movel %a0@(TI_FLAGS),%d1 /* get thread_info->flags */ movel %a0@(TI_FLAGS),%d1 /* get thread_info->flags */
andl #_TIF_WORK_MASK,%d1 andl #0xefff,%d1
jne Lwork_to_do /* still work to do */ jne Lwork_to_do /* still work to do */
Lreturn: Lreturn:

2
drivers/video/atafb.c
View File

@ -1718,11 +1718,9 @@ static int falcon_setcolreg(unsigned int regno, unsigned int red,
(((red & 0xe000) >> 13) | ((red & 0x1000) >> 12) << 8) | (((red & 0xe000) >> 13) | ((red & 0x1000) >> 12) << 8) |
(((green & 0xe000) >> 13) | ((green & 0x1000) >> 12) << 4) | (((green & 0xe000) >> 13) | ((green & 0x1000) >> 12) << 4) |
((blue & 0xe000) >> 13) | ((blue & 0x1000) >> 12); ((blue & 0xe000) >> 13) | ((blue & 0x1000) >> 12);
#ifdef ATAFB_FALCON
((u32 *)info->pseudo_palette)[regno] = ((red & 0xf800) | ((u32 *)info->pseudo_palette)[regno] = ((red & 0xf800) |
((green & 0xfc00) >> 5) | ((green & 0xfc00) >> 5) |
((blue & 0xf800) >> 11)); ((blue & 0xf800) >> 11));
#endif
} }
return 0; return 0;
} }

4
drivers/video/q40fb.c
View File

@ -28,7 +28,7 @@
#define Q40_PHYS_SCREEN_ADDR 0xFE800000 #define Q40_PHYS_SCREEN_ADDR 0xFE800000
static struct fb_fix_screeninfo q40fb_fix __initdata = { static struct fb_fix_screeninfo q40fb_fix __devinitdata = {
.id = "Q40", .id = "Q40",
.smem_len = 1024*1024, .smem_len = 1024*1024,
.type = FB_TYPE_PACKED_PIXELS, .type = FB_TYPE_PACKED_PIXELS,
@ -37,7 +37,7 @@ static struct fb_fix_screeninfo q40fb_fix __initdata = {
.accel = FB_ACCEL_NONE, .accel = FB_ACCEL_NONE,
}; };
static struct fb_var_screeninfo q40fb_var __initdata = { static struct fb_var_screeninfo q40fb_var __devinitdata = {
.xres = 1024, .xres = 1024,
.yres = 512, .yres = 512,
.xres_virtual = 1024, .xres_virtual = 1024,

2
drivers/zorro/zorro.c
View File

@ -142,6 +142,7 @@ static int __init amiga_zorro_probe(struct platform_device *pdev)
error = device_register(&bus->dev); error = device_register(&bus->dev);
if (error) { if (error) {
pr_err("Zorro: Error registering zorro_bus\n"); pr_err("Zorro: Error registering zorro_bus\n");
put_device(&bus->dev);
kfree(bus); kfree(bus);
return error; return error;
} }
@ -175,6 +176,7 @@ static int __init amiga_zorro_probe(struct platform_device *pdev)
if (error) { if (error) {
dev_err(&bus->dev, "Error registering device %s\n", dev_err(&bus->dev, "Error registering device %s\n",
z->name); z->name);
put_device(&z->dev);
continue; continue;
} }
error = zorro_create_sysfs_dev_files(z); error = zorro_create_sysfs_dev_files(z);