pwm: dwc: make timer clock configurable
Add a configurable clock base rate for the pwm as when being built for non-PCI the block may be sourced from an internal clock. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230907161242.67190-3-ben.dooks@codethink.co.uk Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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@ -49,13 +49,13 @@ static int __dwc_pwm_configure_timer(struct dwc_pwm *dwc,
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* periods and check are the result within HW limits between 1 and
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* 2^32 periods.
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*/
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tmp = DIV_ROUND_CLOSEST_ULL(state->duty_cycle, DWC_CLK_PERIOD_NS);
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tmp = DIV_ROUND_CLOSEST_ULL(state->duty_cycle, dwc->clk_ns);
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if (tmp < 1 || tmp > (1ULL << 32))
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return -ERANGE;
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low = tmp - 1;
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tmp = DIV_ROUND_CLOSEST_ULL(state->period - state->duty_cycle,
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DWC_CLK_PERIOD_NS);
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dwc->clk_ns);
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if (tmp < 1 || tmp > (1ULL << 32))
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return -ERANGE;
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high = tmp - 1;
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@ -130,12 +130,12 @@ static int dwc_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
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duty = dwc_pwm_readl(dwc, DWC_TIM_LD_CNT(pwm->hwpwm));
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duty += 1;
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duty *= DWC_CLK_PERIOD_NS;
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duty *= dwc->clk_ns;
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state->duty_cycle = duty;
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period = dwc_pwm_readl(dwc, DWC_TIM_LD_CNT2(pwm->hwpwm));
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period += 1;
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period *= DWC_CLK_PERIOD_NS;
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period *= dwc->clk_ns;
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period += duty;
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state->period = period;
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@ -159,6 +159,7 @@ struct dwc_pwm *dwc_pwm_alloc(struct device *dev)
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if (!dwc)
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return NULL;
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dwc->clk_ns = 10;
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dwc->chip.dev = dev;
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dwc->chip.ops = &dwc_pwm_ops;
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dwc->chip.npwm = DWC_TIMERS_TOTAL;
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@ -24,7 +24,6 @@ MODULE_IMPORT_NS(dwc_pwm);
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#define DWC_TIMERS_COMP_VERSION 0xac
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#define DWC_TIMERS_TOTAL 8
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#define DWC_CLK_PERIOD_NS 10
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/* Timer Control Register */
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#define DWC_TIM_CTRL_EN BIT(0)
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@ -43,6 +42,7 @@ struct dwc_pwm_ctx {
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struct dwc_pwm {
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struct pwm_chip chip;
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void __iomem *base;
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unsigned int clk_ns;
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struct dwc_pwm_ctx ctx[DWC_TIMERS_TOTAL];
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};
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#define to_dwc_pwm(p) (container_of((p), struct dwc_pwm, chip))
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