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Support rv32 ULEB128 test

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Use opcodes available to both rv32 and rv64 in uleb128 module linking
test.

Fixes: af71bc194916 ("riscv: Add tests for riscv module loading")
Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Closes: https://lore.kernel.org/lkml/1d7c71ee-5742-4df4-b8ef-a2aea0a624eb@infradead.org/
Tested-by: Randy Dunlap <rdunlap@infradead.org> # build-tested
Link: https://lore.kernel.org/r/20231122-module_fixup-v2-1-dfb9565e9ea5@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
Charlie Jenkins 2023-11-22 15:35:54 -08:00 committed by Palmer Dabbelt
parent 7c1593410b
commit 82180b1fae
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GPG Key ID: 2E1319F35FBB1889
1 changed files with 4 additions and 4 deletions
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8
arch/riscv/kernel/tests/module_test/test_uleb128.S
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@ -6,13 +6,13 @@
.text
.global test_uleb_basic
test_uleb_basic:
ld a0, second
lw a0, second
addi a0, a0, -127
ret
.global test_uleb_large
test_uleb_large:
ld a0, fourth
lw a0, fourth
addi a0, a0, -0x07e8
ret
@ -22,10 +22,10 @@ first:
second:
.reloc second, R_RISCV_SET_ULEB128, second
.reloc second, R_RISCV_SUB_ULEB128, first
.dword 0
.word 0
third:
.space 1000
fourth:
.reloc fourth, R_RISCV_SET_ULEB128, fourth
.reloc fourth, R_RISCV_SUB_ULEB128, third
.dword 0
.word 0