pci-v4.9-fixes-3
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This commit is contained in:
Linus Torvalds
commit
8233008f5d
@ -26,13 +26,16 @@ Required properties:
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- "sys"
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- "legacy"
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- "client"
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- resets: Must contain five entries for each entry in reset-names.
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- resets: Must contain seven entries for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names: Must include the following names
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- "core"
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- "mgmt"
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- "mgmt-sticky"
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- "pipe"
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- "pm"
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- "aclk"
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- "pclk"
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- pinctrl-names : The pin control state names
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- pinctrl-0: The "default" pinctrl state
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- #interrupt-cells: specifies the number of cells needed to encode an
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@ -86,8 +89,10 @@ pcie0: pcie@f8000000 {
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reg = <0x0 0xf8000000 0x0 0x2000000>, <0x0 0xfd000000 0x0 0x1000000>;
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reg-names = "axi-base", "apb-base";
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resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
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<&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>;
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reset-names = "core", "mgmt", "mgmt-sticky", "pipe";
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<&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE> ,
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<&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>, <&cru SRST_A_PCIE>;
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reset-names = "core", "mgmt", "mgmt-sticky", "pipe",
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"pm", "pclk", "aclk";
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phys = <&pcie_phy>;
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phy-names = "pcie-phy";
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pinctrl-names = "default";
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@ -9335,7 +9335,7 @@ PCI DRIVER FOR INTEL VOLUME MANAGEMENT DEVICE (VMD)
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M: Keith Busch <keith.busch@intel.com>
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L: linux-pci@vger.kernel.org
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S: Supported
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F: arch/x86/pci/vmd.c
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F: drivers/pci/host/vmd.c
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PCIE DRIVER FOR ST SPEAR13XX
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M: Pratyush Anand <pratyush.anand@gmail.com>
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@ -300,8 +300,11 @@
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ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000
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0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000>;
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resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
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<&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>;
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reset-names = "core", "mgmt", "mgmt-sticky", "pipe";
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<&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>,
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<&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>,
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<&cru SRST_A_PCIE>;
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reset-names = "core", "mgmt", "mgmt-sticky", "pipe",
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"pm", "pclk", "aclk";
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status = "disabled";
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pcie0_intc: interrupt-controller {
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@ -190,6 +190,9 @@ struct rockchip_pcie {
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struct reset_control *mgmt_rst;
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struct reset_control *mgmt_sticky_rst;
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struct reset_control *pipe_rst;
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struct reset_control *pm_rst;
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struct reset_control *aclk_rst;
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struct reset_control *pclk_rst;
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struct clk *aclk_pcie;
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struct clk *aclk_perf_pcie;
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struct clk *hclk_pcie;
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@ -408,6 +411,44 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
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gpiod_set_value(rockchip->ep_gpio, 0);
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err = reset_control_assert(rockchip->aclk_rst);
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if (err) {
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dev_err(dev, "assert aclk_rst err %d\n", err);
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return err;
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}
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err = reset_control_assert(rockchip->pclk_rst);
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if (err) {
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dev_err(dev, "assert pclk_rst err %d\n", err);
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return err;
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}
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err = reset_control_assert(rockchip->pm_rst);
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if (err) {
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dev_err(dev, "assert pm_rst err %d\n", err);
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return err;
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}
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udelay(10);
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err = reset_control_deassert(rockchip->pm_rst);
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if (err) {
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dev_err(dev, "deassert pm_rst err %d\n", err);
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return err;
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}
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err = reset_control_deassert(rockchip->aclk_rst);
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if (err) {
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dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err);
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return err;
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}
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err = reset_control_deassert(rockchip->pclk_rst);
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if (err) {
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dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err);
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return err;
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}
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err = phy_init(rockchip->phy);
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if (err < 0) {
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dev_err(dev, "fail to init phy, err %d\n", err);
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@ -781,6 +822,27 @@ static int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
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return PTR_ERR(rockchip->pipe_rst);
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}
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rockchip->pm_rst = devm_reset_control_get(dev, "pm");
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if (IS_ERR(rockchip->pm_rst)) {
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if (PTR_ERR(rockchip->pm_rst) != -EPROBE_DEFER)
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dev_err(dev, "missing pm reset property in node\n");
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return PTR_ERR(rockchip->pm_rst);
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}
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rockchip->pclk_rst = devm_reset_control_get(dev, "pclk");
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if (IS_ERR(rockchip->pclk_rst)) {
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if (PTR_ERR(rockchip->pclk_rst) != -EPROBE_DEFER)
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dev_err(dev, "missing pclk reset property in node\n");
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return PTR_ERR(rockchip->pclk_rst);
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}
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rockchip->aclk_rst = devm_reset_control_get(dev, "aclk");
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if (IS_ERR(rockchip->aclk_rst)) {
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if (PTR_ERR(rockchip->aclk_rst) != -EPROBE_DEFER)
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dev_err(dev, "missing aclk reset property in node\n");
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return PTR_ERR(rockchip->aclk_rst);
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}
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rockchip->ep_gpio = devm_gpiod_get(dev, "ep", GPIOD_OUT_HIGH);
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if (IS_ERR(rockchip->ep_gpio)) {
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dev_err(dev, "missing ep-gpios property in node\n");
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@ -121,6 +121,14 @@ int pci_claim_resource(struct pci_dev *dev, int resource)
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return -EINVAL;
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}
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/*
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* If we have a shadow copy in RAM, the PCI device doesn't respond
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* to the shadow range, so we don't need to claim it, and upstream
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* bridges don't need to route the range to the device.
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*/
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if (res->flags & IORESOURCE_ROM_SHADOW)
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return 0;
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root = pci_find_parent_resource(dev, res);
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if (!root) {
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dev_info(&dev->dev, "can't claim BAR %d %pR: no compatible bridge window\n",
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