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drm/i915/dsi: Replace poking of VLV GPIOs behind the driver's back

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It's a dirty hack in the driver that pokes GPIO registers behind
the driver's back. Moreoever it might be problematic as simultaneous
I/O may hang the system, see the commit 40ecab551232 ("pinctrl:
baytrail: Really serialize all register accesses") for the details.
Taking all this into consideration replace the hack with proper
GPIO APIs being used.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Tested-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231103201831.1037416-13-andriy.shevchenko@linux.intel.com
This commit is contained in:
Andy Shevchenko 2023-11-03 22:18:27 +02:00 committed by Jani Nikula
parent 47ab020394
commit 8241b55f1d
1 changed files with 28 additions and 70 deletions
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98
drivers/gpu/drm/i915/display/intel_dsi_vbt.c
View File

@ -55,43 +55,6 @@
#define MIPI_VIRTUAL_CHANNEL_SHIFT 1 #define MIPI_VIRTUAL_CHANNEL_SHIFT 1
#define MIPI_PORT_SHIFT 3 #define MIPI_PORT_SHIFT 3
/* base offsets for gpio pads */
#define VLV_GPIO_NC_0_HV_DDI0_HPD 0x4130
#define VLV_GPIO_NC_1_HV_DDI0_DDC_SDA 0x4120
#define VLV_GPIO_NC_2_HV_DDI0_DDC_SCL 0x4110
#define VLV_GPIO_NC_3_PANEL0_VDDEN 0x4140
#define VLV_GPIO_NC_4_PANEL0_BKLTEN 0x4150
#define VLV_GPIO_NC_5_PANEL0_BKLTCTL 0x4160
#define VLV_GPIO_NC_6_HV_DDI1_HPD 0x4180
#define VLV_GPIO_NC_7_HV_DDI1_DDC_SDA 0x4190
#define VLV_GPIO_NC_8_HV_DDI1_DDC_SCL 0x4170
#define VLV_GPIO_NC_9_PANEL1_VDDEN 0x4100
#define VLV_GPIO_NC_10_PANEL1_BKLTEN 0x40E0
#define VLV_GPIO_NC_11_PANEL1_BKLTCTL 0x40F0
#define VLV_GPIO_PCONF0(base_offset) (base_offset)
#define VLV_GPIO_PAD_VAL(base_offset) ((base_offset) + 8)
struct gpio_map {
u16 base_offset;
bool init;
};
static struct gpio_map vlv_gpio_table[] = {
{ VLV_GPIO_NC_0_HV_DDI0_HPD },
{ VLV_GPIO_NC_1_HV_DDI0_DDC_SDA },
{ VLV_GPIO_NC_2_HV_DDI0_DDC_SCL },
{ VLV_GPIO_NC_3_PANEL0_VDDEN },
{ VLV_GPIO_NC_4_PANEL0_BKLTEN },
{ VLV_GPIO_NC_5_PANEL0_BKLTCTL },
{ VLV_GPIO_NC_6_HV_DDI1_HPD },
{ VLV_GPIO_NC_7_HV_DDI1_DDC_SDA },
{ VLV_GPIO_NC_8_HV_DDI1_DDC_SCL },
{ VLV_GPIO_NC_9_PANEL1_VDDEN },
{ VLV_GPIO_NC_10_PANEL1_BKLTEN },
{ VLV_GPIO_NC_11_PANEL1_BKLTCTL },
};
struct i2c_adapter_lookup { struct i2c_adapter_lookup {
u16 slave_addr; u16 slave_addr;
struct intel_dsi *intel_dsi; struct intel_dsi *intel_dsi;
@ -268,52 +231,47 @@ static void soc_gpio_set_value(struct intel_connector *connector, const char *co
} }
} }
static void soc_opaque_gpio_set_value(struct intel_connector *connector,
const char *chip, const char *con_id,
u8 gpio_index, bool value)
{
struct gpiod_lookup_table *lookup;
lookup = kzalloc(struct_size(lookup, table, 2), GFP_KERNEL);
if (!lookup)
return;
lookup->dev_id = "0000:00:02.0";
lookup->table[0] =
GPIO_LOOKUP_IDX(chip, gpio_index, con_id, gpio_index, GPIO_ACTIVE_HIGH);
gpiod_add_lookup_table(lookup);
soc_gpio_set_value(connector, con_id, gpio_index, value);
gpiod_remove_lookup_table(lookup);
kfree(lookup);
}
static void vlv_gpio_set_value(struct intel_connector *connector, static void vlv_gpio_set_value(struct intel_connector *connector,
u8 gpio_source, u8 gpio_index, bool value) u8 gpio_source, u8 gpio_index, bool value)
{ {
struct drm_i915_private *dev_priv = to_i915(connector->base.dev); struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct gpio_map *map;
u16 pconf0, padval;
u32 tmp;
u8 port;
if (gpio_index >= ARRAY_SIZE(vlv_gpio_table)) { /* XXX: this assumes vlv_gpio_table only has NC GPIOs. */
drm_dbg_kms(&dev_priv->drm, "unknown gpio index %u\n", if (connector->panel.vbt.dsi.seq_version < 3) {
gpio_index); if (gpio_source == 1) {
return;
}
map = &vlv_gpio_table[gpio_index];
if (connector->panel.vbt.dsi.seq_version >= 3) {
/* XXX: this assumes vlv_gpio_table only has NC GPIOs. */
port = IOSF_PORT_GPIO_NC;
} else {
if (gpio_source == 0) {
port = IOSF_PORT_GPIO_NC;
} else if (gpio_source == 1) {
drm_dbg_kms(&dev_priv->drm, "SC gpio not supported\n"); drm_dbg_kms(&dev_priv->drm, "SC gpio not supported\n");
return; return;
} else { }
if (gpio_source > 1) {
drm_dbg_kms(&dev_priv->drm, drm_dbg_kms(&dev_priv->drm,
"unknown gpio source %u\n", gpio_source); "unknown gpio source %u\n", gpio_source);
return; return;
} }
} }
pconf0 = VLV_GPIO_PCONF0(map->base_offset); soc_opaque_gpio_set_value(connector, "INT33FC:01", "Panel N", gpio_index, value);
padval = VLV_GPIO_PAD_VAL(map->base_offset);
vlv_iosf_sb_get(dev_priv, BIT(VLV_IOSF_SB_GPIO));
if (!map->init) {
/* FIXME: remove constant below */
vlv_iosf_sb_write(dev_priv, port, pconf0, 0x2000CC00);
map->init = true;
}
tmp = 0x4 | value;
vlv_iosf_sb_write(dev_priv, port, padval, tmp);
vlv_iosf_sb_put(dev_priv, BIT(VLV_IOSF_SB_GPIO));
} }
static void chv_gpio_set_value(struct intel_connector *connector, static void chv_gpio_set_value(struct intel_connector *connector,