drm/amdgpu: use a sync object for VMID fences v2
v2: rebase & cleanup This way we can store more than one fence as user for each VMID. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> (v1) Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -588,6 +588,9 @@ int amdgpu_sync_resv(struct amdgpu_device *adev,
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struct amdgpu_sync *sync,
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struct reservation_object *resv,
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void *owner);
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bool amdgpu_sync_is_idle(struct amdgpu_sync *sync);
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int amdgpu_sync_cycle_fences(struct amdgpu_sync *dst, struct amdgpu_sync *src,
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struct fence *fence);
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struct fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync);
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int amdgpu_sync_wait(struct amdgpu_sync *sync);
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void amdgpu_sync_free(struct amdgpu_sync *sync);
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@ -875,7 +878,8 @@ struct amdgpu_vm {
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struct amdgpu_vm_id {
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struct list_head list;
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struct fence *active;
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struct fence *first;
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struct amdgpu_sync active;
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atomic_long_t owner;
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uint64_t pd_gpu_addr;
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@ -108,6 +108,29 @@ static void amdgpu_sync_keep_later(struct fence **keep, struct fence *fence)
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*keep = fence_get(fence);
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}
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/**
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* amdgpu_sync_add_later - add the fence to the hash
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*
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* @sync: sync object to add the fence to
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* @f: fence to add
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*
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* Tries to add the fence to an existing hash entry. Returns true when an entry
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* was found, false otherwise.
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*/
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static bool amdgpu_sync_add_later(struct amdgpu_sync *sync, struct fence *f)
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{
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struct amdgpu_sync_entry *e;
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hash_for_each_possible(sync->fences, e, node, f->context) {
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if (unlikely(e->fence->context != f->context))
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continue;
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amdgpu_sync_keep_later(&e->fence, f);
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return true;
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}
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return false;
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}
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/**
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* amdgpu_sync_fence - remember to sync to this fence
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*
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@ -127,13 +150,8 @@ int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
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amdgpu_sync_get_owner(f) == AMDGPU_FENCE_OWNER_VM)
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amdgpu_sync_keep_later(&sync->last_vm_update, f);
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hash_for_each_possible(sync->fences, e, node, f->context) {
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if (unlikely(e->fence->context != f->context))
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continue;
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amdgpu_sync_keep_later(&e->fence, f);
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if (amdgpu_sync_add_later(sync, f))
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return 0;
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}
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e = kmem_cache_alloc(amdgpu_sync_slab, GFP_KERNEL);
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if (!e)
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@ -204,6 +222,81 @@ int amdgpu_sync_resv(struct amdgpu_device *adev,
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return r;
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}
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/**
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* amdgpu_sync_is_idle - test if all fences are signaled
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*
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* @sync: the sync object
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*
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* Returns true if all fences in the sync object are signaled.
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*/
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bool amdgpu_sync_is_idle(struct amdgpu_sync *sync)
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{
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struct amdgpu_sync_entry *e;
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struct hlist_node *tmp;
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int i;
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hash_for_each_safe(sync->fences, i, tmp, e, node) {
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struct fence *f = e->fence;
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if (fence_is_signaled(f)) {
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hash_del(&e->node);
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fence_put(f);
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kmem_cache_free(amdgpu_sync_slab, e);
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continue;
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}
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return false;
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}
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return true;
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}
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/**
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* amdgpu_sync_cycle_fences - move fences from one sync object into another
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*
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* @dst: the destination sync object
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* @src: the source sync object
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* @fence: fence to add to source
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*
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* Remove all fences from source and put them into destination and add
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* fence as new one into source.
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*/
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int amdgpu_sync_cycle_fences(struct amdgpu_sync *dst, struct amdgpu_sync *src,
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struct fence *fence)
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{
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struct amdgpu_sync_entry *e, *newone;
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struct hlist_node *tmp;
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int i;
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/* Allocate the new entry before moving the old ones */
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newone = kmem_cache_alloc(amdgpu_sync_slab, GFP_KERNEL);
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if (!newone)
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return -ENOMEM;
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hash_for_each_safe(src->fences, i, tmp, e, node) {
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struct fence *f = e->fence;
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hash_del(&e->node);
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if (fence_is_signaled(f)) {
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fence_put(f);
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kmem_cache_free(amdgpu_sync_slab, e);
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continue;
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}
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if (amdgpu_sync_add_later(dst, f)) {
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kmem_cache_free(amdgpu_sync_slab, e);
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continue;
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}
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hash_add(dst->fences, &e->node, f->context);
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}
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hash_add(src->fences, &newone->node, fence->context);
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newone->fence = fence_get(fence);
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return 0;
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}
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struct fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync)
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{
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struct amdgpu_sync_entry *e;
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@ -189,14 +189,13 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
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if (usable) {
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r = amdgpu_sync_fence(ring->adev, sync, id->active);
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if (r) {
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mutex_unlock(&adev->vm_manager.lock);
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return r;
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}
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r = amdgpu_sync_fence(ring->adev, sync, id->first);
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if (r)
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goto error;
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fence_put(id->active);
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id->active = fence_get(fence);
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r = amdgpu_sync_fence(ring->adev, &id->active, fence);
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if (r)
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goto error;
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list_move_tail(&id->list, &adev->vm_manager.ids_lru);
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@ -214,13 +213,13 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
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struct amdgpu_vm_id,
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list);
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if (id->active && !fence_is_signaled(id->active)) {
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struct amdgpu_vm_id *tmp;
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if (!amdgpu_sync_is_idle(&id->active)) {
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struct list_head *head = &adev->vm_manager.ids_lru;
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struct amdgpu_vm_id *tmp;
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list_for_each_entry_safe(id, tmp, &adev->vm_manager.ids_lru,
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list) {
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if (id->active && fence_is_signaled(id->active)) {
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if (amdgpu_sync_is_idle(&id->active)) {
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list_move(&id->list, head);
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head = &id->list;
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}
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@ -230,25 +229,27 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
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list);
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}
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r = amdgpu_sync_fence(ring->adev, sync, id->active);
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if (!r) {
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fence_put(id->active);
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id->active = fence_get(fence);
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r = amdgpu_sync_cycle_fences(sync, &id->active, fence);
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if (r)
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goto error;
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fence_put(id->flushed_updates);
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id->flushed_updates = fence_get(updates);
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fence_put(id->first);
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id->first = fence_get(fence);
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id->pd_gpu_addr = pd_addr;
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fence_put(id->flushed_updates);
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id->flushed_updates = fence_get(updates);
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list_move_tail(&id->list, &adev->vm_manager.ids_lru);
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atomic_long_set(&id->owner, (long)&vm->ids[ring->idx]);
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vm->ids[ring->idx] = id;
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id->pd_gpu_addr = pd_addr;
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*vm_id = id - adev->vm_manager.ids;
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*vm_pd_addr = pd_addr;
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trace_amdgpu_vm_grab_id(vm, ring->idx, *vm_id, *vm_pd_addr);
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}
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list_move_tail(&id->list, &adev->vm_manager.ids_lru);
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atomic_long_set(&id->owner, (long)id);
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vm->ids[ring->idx] = id;
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*vm_id = id - adev->vm_manager.ids;
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*vm_pd_addr = pd_addr;
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trace_amdgpu_vm_grab_id(vm, ring->idx, *vm_id, *vm_pd_addr);
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error:
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mutex_unlock(&adev->vm_manager.lock);
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return r;
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}
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@ -1467,6 +1468,7 @@ void amdgpu_vm_manager_init(struct amdgpu_device *adev)
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/* skip over VMID 0, since it is the system VM */
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for (i = 1; i < adev->vm_manager.num_ids; ++i) {
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amdgpu_vm_reset_id(adev, i);
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amdgpu_sync_create(&adev->vm_manager.ids[i].active);
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list_add_tail(&adev->vm_manager.ids[i].list,
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&adev->vm_manager.ids_lru);
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}
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@ -1488,7 +1490,8 @@ void amdgpu_vm_manager_fini(struct amdgpu_device *adev)
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for (i = 0; i < AMDGPU_NUM_VM; ++i) {
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struct amdgpu_vm_id *id = &adev->vm_manager.ids[i];
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fence_put(id->active);
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fence_put(adev->vm_manager.ids[i].first);
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amdgpu_sync_free(&adev->vm_manager.ids[i].active);
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fence_put(id->flushed_updates);
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}
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}
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