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drm/amd/display: Connect clock optimization function to dcn301

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[why/how]
Connecting clock optimization functions to dcn301 HWSS
to enable power state enter/exit optimization

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Acked-by: Bindu Ramamurthy <bindur12@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Mikita Lipski 2020-12-01 10:52:58 -05:00 committed by Alex Deucher
parent 719349f849
commit 83d76eeb7b
1 changed files with 2 additions and 0 deletions
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2
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_init.c
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@ -99,6 +99,8 @@ static const struct hw_sequencer_funcs dcn301_funcs = {
.set_pipe = dcn21_set_pipe,
.set_disp_pattern_generator = dcn30_set_disp_pattern_generator,
.get_dcc_en_bits = dcn10_get_dcc_en_bits,
.optimize_pwr_state = dcn21_optimize_pwr_state,
.exit_optimized_pwr_state = dcn21_exit_optimized_pwr_state,
};
static const struct hwseq_private_funcs dcn301_private_funcs = {