ice: Don't reject odd values of usecs set by user
Currently if a user sets an odd [tx|rx]-usecs value through ethtool, the request is denied because the hardware is set to have an ITR granularity of 2us. This caused poor customer experience. Fix this by aligning to a register allowed value, which results in rounding down. Also, print a once per ring container type message to be clear about our intentions. Also, change the ITR_TO_REG define to be the bitwise and of the ITR setting and the ICE_ITR_MASK. This makes the purpose of ITR_TO_REG more obvious. Signed-off-by: Brett Creeley <brett.creeley@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -3489,21 +3489,13 @@ ice_set_rc_coalesce(enum ice_container_type c_type, struct ethtool_coalesce *ec,
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return -EINVAL;
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}
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/* hardware only supports an ITR granularity of 2us */
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if (coalesce_usecs % 2 != 0) {
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netdev_info(vsi->netdev, "Invalid value, %s-usecs must be even\n",
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c_type_str);
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return -EINVAL;
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}
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if (use_adaptive_coalesce) {
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rc->itr_setting |= ICE_ITR_DYNAMIC;
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} else {
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/* store user facing value how it was set */
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/* save the user set usecs */
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rc->itr_setting = coalesce_usecs;
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/* set to static and convert to value HW understands */
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rc->target_itr =
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ITR_TO_REG(ITR_REG_ALIGN(rc->itr_setting));
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/* device ITR granularity is in 2 usec increments */
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rc->target_itr = ITR_REG_ALIGN(rc->itr_setting);
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}
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return 0;
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@ -3596,6 +3588,30 @@ ice_is_coalesce_param_invalid(struct net_device *netdev,
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return 0;
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}
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/**
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* ice_print_if_odd_usecs - print message if user tries to set odd [tx|rx]-usecs
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* @netdev: netdev used for print
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* @itr_setting: previous user setting
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* @use_adaptive_coalesce: if adaptive coalesce is enabled or being enabled
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* @coalesce_usecs: requested value of [tx|rx]-usecs
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* @c_type_str: either "rx" or "tx" to match user set field of [tx|rx]-usecs
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*/
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static void
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ice_print_if_odd_usecs(struct net_device *netdev, u16 itr_setting,
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u32 use_adaptive_coalesce, u32 coalesce_usecs,
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const char *c_type_str)
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{
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if (use_adaptive_coalesce)
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return;
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itr_setting = ITR_TO_REG(itr_setting);
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if (itr_setting != coalesce_usecs && (coalesce_usecs % 2))
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netdev_info(netdev, "User set %s-usecs to %d, device only supports even values. Rounding down and attempting to set %s-usecs to %d\n",
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c_type_str, coalesce_usecs, c_type_str,
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ITR_REG_ALIGN(coalesce_usecs));
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}
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/**
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* __ice_set_coalesce - set ITR/INTRL values for the device
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* @netdev: pointer to the netdev associated with this query
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@ -3616,8 +3632,19 @@ __ice_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ec,
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return -EINVAL;
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if (q_num < 0) {
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struct ice_q_vector *q_vector = vsi->q_vectors[0];
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int v_idx;
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if (q_vector) {
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ice_print_if_odd_usecs(netdev, q_vector->rx.itr_setting,
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ec->use_adaptive_rx_coalesce,
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ec->rx_coalesce_usecs, "rx");
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ice_print_if_odd_usecs(netdev, q_vector->tx.itr_setting,
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ec->use_adaptive_tx_coalesce,
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ec->tx_coalesce_usecs, "tx");
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}
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ice_for_each_q_vector(vsi, v_idx) {
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/* In some cases if DCB is configured the num_[rx|tx]q
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* can be less than vsi->num_q_vectors. This check
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@ -222,7 +222,7 @@ enum ice_rx_dtype {
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#define ICE_ITR_GRAN_S 1 /* ITR granularity is always 2us */
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#define ICE_ITR_GRAN_US BIT(ICE_ITR_GRAN_S)
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#define ICE_ITR_MASK 0x1FFE /* ITR register value alignment mask */
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#define ITR_REG_ALIGN(setting) __ALIGN_MASK(setting, ~ICE_ITR_MASK)
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#define ITR_REG_ALIGN(setting) ((setting) & ICE_ITR_MASK)
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#define ICE_ITR_ADAPTIVE_MIN_INC 0x0002
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#define ICE_ITR_ADAPTIVE_MIN_USECS 0x0002
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