dt-bindings: display: mediatek, hdmi: Convert to use graph schema
Update the mediatek,dpi binding to use the graph schema. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
This commit is contained in:
Neil Armstrong
Chun-Kuang Hu
parent
6efb943b86
commit
8562e78c0b
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/mediatek/mediatek,cec.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek HDMI CEC Controller Device Tree Bindings
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maintainers:
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- CK Hu <ck.hu@mediatek.com>
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- Jitao shi <jitao.shi@mediatek.com>
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description: |
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The HDMI CEC controller handles hotplug detection and CEC communication.
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properties:
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compatible:
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enum:
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- mediatek,mt7623-cec
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- mediatek,mt8173-cec
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/mt8173-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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cec: cec@10013000 {
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compatible = "mediatek,mt8173-cec";
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reg = <0x10013000 0xbc>;
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interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&infracfg CLK_INFRA_CEC>;
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};
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...
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@ -0,0 +1,57 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi-ddc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek HDMI DDC Device Tree Bindings
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maintainers:
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- CK Hu <ck.hu@mediatek.com>
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- Jitao shi <jitao.shi@mediatek.com>
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description: |
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The HDMI DDC i2c controller is used to interface with the HDMI DDC pins.
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properties:
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compatible:
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enum:
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- mediatek,mt7623-hdmi-ddc
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- mediatek,mt8173-hdmi-ddc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: ddc-i2c
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/mt8173-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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hdmi_ddc0: i2c@11012000 {
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compatible = "mediatek,mt8173-hdmi-ddc";
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reg = <0x11012000 0x1c>;
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interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&pericfg CLK_PERI_I2C5>;
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clock-names = "ddc-i2c";
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};
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...
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@ -1,136 +0,0 @@
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Mediatek HDMI Encoder
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=====================
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The Mediatek HDMI encoder can generate HDMI 1.4a or MHL 2.0 signals from
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its parallel input.
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Required properties:
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- compatible: Should be "mediatek,<chip>-hdmi".
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- the supported chips are mt2701, mt7623 and mt8173
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- reg: Physical base address and length of the controller's registers
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- interrupts: The interrupt signal from the function block.
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- clocks: device clocks
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See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
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- clock-names: must contain "pixel", "pll", "bclk", and "spdif".
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- phys: phandle link to the HDMI PHY node.
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See Documentation/devicetree/bindings/phy/phy-bindings.txt for details.
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- phy-names: must contain "hdmi"
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- mediatek,syscon-hdmi: phandle link and register offset to the system
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configuration registers. For mt8173 this must be offset 0x900 into the
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MMSYS_CONFIG region: <&mmsys 0x900>.
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- ports: A node containing input and output port nodes with endpoint
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definitions as documented in Documentation/devicetree/bindings/graph.txt.
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- port@0: The input port in the ports node should be connected to a DPI output
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port.
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- port@1: The output port in the ports node should be connected to the input
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port of a connector node that contains a ddc-i2c-bus property, or to the
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input port of an attached bridge chip, such as a SlimPort transmitter.
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HDMI CEC
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========
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The HDMI CEC controller handles hotplug detection and CEC communication.
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Required properties:
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- compatible: Should be "mediatek,<chip>-cec"
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- the supported chips are mt7623 and mt8173
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- reg: Physical base address and length of the controller's registers
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- interrupts: The interrupt signal from the function block.
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- clocks: device clock
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HDMI DDC
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========
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The HDMI DDC i2c controller is used to interface with the HDMI DDC pins.
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The Mediatek's I2C controller is used to interface with I2C devices.
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Required properties:
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- compatible: Should be "mediatek,<chip>-hdmi-ddc"
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- the supported chips are mt7623 and mt8173
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- reg: Physical base address and length of the controller's registers
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- clocks: device clock
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- clock-names: Should be "ddc-i2c".
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HDMI PHY
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========
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See phy/mediatek,hdmi-phy.yaml
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Example:
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cec: cec@10013000 {
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compatible = "mediatek,mt8173-cec";
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reg = <0 0x10013000 0 0xbc>;
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interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&infracfg CLK_INFRA_CEC>;
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};
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hdmi_phy: hdmi-phy@10209100 {
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compatible = "mediatek,mt8173-hdmi-phy";
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reg = <0 0x10209100 0 0x24>;
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clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>;
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clock-names = "pll_ref";
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clock-output-names = "hdmitx_dig_cts";
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mediatek,ibias = <0xa>;
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mediatek,ibias_up = <0x1c>;
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#clock-cells = <0>;
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#phy-cells = <0>;
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};
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hdmi_ddc0: i2c@11012000 {
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compatible = "mediatek,mt8173-hdmi-ddc";
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reg = <0 0x11012000 0 0x1c>;
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interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&pericfg CLK_PERI_I2C5>;
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clock-names = "ddc-i2c";
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};
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hdmi0: hdmi@14025000 {
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compatible = "mediatek,mt8173-hdmi";
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reg = <0 0x14025000 0 0x400>;
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interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&mmsys CLK_MM_HDMI_PIXEL>,
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<&mmsys CLK_MM_HDMI_PLLCK>,
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<&mmsys CLK_MM_HDMI_AUDIO>,
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<&mmsys CLK_MM_HDMI_SPDIF>;
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clock-names = "pixel", "pll", "bclk", "spdif";
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pinctrl-names = "default";
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pinctrl-0 = <&hdmi_pin>;
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phys = <&hdmi_phy>;
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phy-names = "hdmi";
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mediatek,syscon-hdmi = <&mmsys 0x900>;
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assigned-clocks = <&topckgen CLK_TOP_HDMI_SEL>;
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assigned-clock-parents = <&hdmi_phy>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hdmi0_in: endpoint {
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remote-endpoint = <&dpi0_out>;
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};
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};
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port@1 {
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reg = <1>;
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hdmi0_out: endpoint {
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remote-endpoint = <&hdmi_con_in>;
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};
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};
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};
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};
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connector {
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compatible = "hdmi-connector";
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type = "a";
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ddc-i2c-bus = <&hdmiddc0>;
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port {
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hdmi_con_in: endpoint {
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remote-endpoint = <&hdmi0_out>;
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};
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};
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};
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@ -0,0 +1,132 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek HDMI Encoder Device Tree Bindings
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maintainers:
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- CK Hu <ck.hu@mediatek.com>
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- Jitao shi <jitao.shi@mediatek.com>
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description: |
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The Mediatek HDMI encoder can generate HDMI 1.4a or MHL 2.0 signals from
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its parallel input.
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properties:
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compatible:
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enum:
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- mediatek,mt2701-hdmi
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- mediatek,mt7623-hdmi
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- mediatek,mt8173-hdmi
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: Pixel Clock
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- description: HDMI PLL
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- description: Bit Clock
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- description: S/PDIF Clock
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clock-names:
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items:
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- const: pixel
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- const: pll
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- const: bclk
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- const: spdif
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phys:
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maxItems: 1
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phy-names:
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items:
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- const: hdmi
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mediatek,syscon-hdmi:
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$ref: '/schemas/types.yaml#/definitions/phandle-array'
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maxItems: 1
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description: |
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phandle link and register offset to the system configuration registers.
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/properties/port
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description: |
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Input port node. This port should be connected to a DPI output port.
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description: |
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Output port node. This port should be connected to the input port of a connector
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node that contains a ddc-i2c-bus property, or to the input port of an attached
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bridge chip, such as a SlimPort transmitter.
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required:
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- port@0
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- port@1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- phys
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- phy-names
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- mediatek,syscon-hdmi
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- ports
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/mt8173-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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hdmi0: hdmi@14025000 {
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compatible = "mediatek,mt8173-hdmi";
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reg = <0x14025000 0x400>;
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interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&mmsys CLK_MM_HDMI_PIXEL>,
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<&mmsys CLK_MM_HDMI_PLLCK>,
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<&mmsys CLK_MM_HDMI_AUDIO>,
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<&mmsys CLK_MM_HDMI_SPDIF>;
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clock-names = "pixel", "pll", "bclk", "spdif";
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pinctrl-names = "default";
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pinctrl-0 = <&hdmi_pin>;
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phys = <&hdmi_phy>;
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phy-names = "hdmi";
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mediatek,syscon-hdmi = <&mmsys 0x900>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hdmi0_in: endpoint {
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remote-endpoint = <&dpi0_out>;
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};
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};
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port@1 {
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reg = <1>;
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hdmi0_out: endpoint {
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remote-endpoint = <&hdmi_con_in>;
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};
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};
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};
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};
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...
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