powerpc: drop PowerQUICC II Family ADS platform support
Based on documentation revision dates, this MPC82xx pq2fads system predates the MPC8272-ADS variant by about a year and only has 1/2 the amount of RAM (32MB) -- largely making it useless with a modern v6.x kernel from today. Similar to the MPC8272-ADS the pq2fads also supported other 82xx CPU variants, had 8MB flash, and like the 8272 ADS platform, was on a fairly large PCB in order to have space for breakout connectors for all features. These 82xx platforms are two decades old, and originally made for a small group of industry related people in order to assist in new OEM board designs. Given that, it makes sense to remove support today. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20230224204959.17425-3-paul.gortmaker@windriver.com
This commit is contained in:
Paul Gortmaker
Michael Ellerman
parent
33777a4e9b
commit
859b21a008
@ -329,7 +329,6 @@ image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200b
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image-$(CONFIG_PPC_MEDIA5200) += cuImage.media5200
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image-$(CONFIG_PPC_MEDIA5200) += cuImage.media5200
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# Board ports in arch/powerpc/platform/82xx/Kconfig
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# Board ports in arch/powerpc/platform/82xx/Kconfig
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image-$(CONFIG_PQ2FADS) += cuImage.pq2fads
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image-$(CONFIG_EP8248E) += dtbImage.ep8248e
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image-$(CONFIG_EP8248E) += dtbImage.ep8248e
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# Board ports in arch/powerpc/platform/83xx/Kconfig
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# Board ports in arch/powerpc/platform/83xx/Kconfig
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@ -1,243 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
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*
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* Copyright 2007,2008 Freescale Semiconductor Inc.
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*/
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/dts-v1/;
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/ {
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model = "pq2fads";
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compatible = "fsl,pq2fads";
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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ethernet0 = &enet0;
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ethernet1 = &enet1;
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serial0 = &serial0;
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serial1 = &serial1;
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pci0 = &pci0;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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reg = <0x0>;
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d-cache-line-size = <32>;
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i-cache-line-size = <32>;
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d-cache-size = <16384>;
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i-cache-size = <16384>;
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timebase-frequency = <0>;
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clock-frequency = <0>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x0>;
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};
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localbus@f0010100 {
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compatible = "fsl,mpc8280-localbus",
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"fsl,pq2-localbus";
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#address-cells = <2>;
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#size-cells = <1>;
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reg = <0xf0010100 0x60>;
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ranges = <0x0 0x0 0xff800000 0x800000
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0x1 0x0 0xf4500000 0x8000
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0x8 0x0 0xf8200000 0x8000>;
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flash@0,0 {
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compatible = "jedec-flash";
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reg = <0x0 0x0 0x800000>;
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bank-width = <4>;
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device-width = <1>;
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};
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bcsr@1,0 {
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reg = <0x1 0x0 0x20>;
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compatible = "fsl,pq2fads-bcsr";
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};
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PCI_PIC: pic@8,0 {
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#interrupt-cells = <1>;
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interrupt-controller;
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reg = <0x8 0x0 0x8>;
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compatible = "fsl,pq2ads-pci-pic";
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interrupt-parent = <&PIC>;
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interrupts = <24 8>;
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};
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};
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pci0: pci@f0010800 {
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device_type = "pci";
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reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
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compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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clock-frequency = <66000000>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x16 */
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0xb000 0x0 0x0 0x1 &PCI_PIC 0
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0xb000 0x0 0x0 0x2 &PCI_PIC 1
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0xb000 0x0 0x0 0x3 &PCI_PIC 2
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0xb000 0x0 0x0 0x4 &PCI_PIC 3
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/* IDSEL 0x17 */
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0xb800 0x0 0x0 0x1 &PCI_PIC 4
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0xb800 0x0 0x0 0x2 &PCI_PIC 5
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0xb800 0x0 0x0 0x3 &PCI_PIC 6
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0xb800 0x0 0x0 0x4 &PCI_PIC 7
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/* IDSEL 0x18 */
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0xc000 0x0 0x0 0x1 &PCI_PIC 8
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0xc000 0x0 0x0 0x2 &PCI_PIC 9
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0xc000 0x0 0x0 0x3 &PCI_PIC 10
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0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
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interrupt-parent = <&PIC>;
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interrupts = <18 8>;
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ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
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0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
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0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
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};
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soc@f0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "fsl,mpc8280", "fsl,pq2-soc";
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ranges = <0x0 0xf0000000 0x53000>;
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// Temporary -- will go away once kernel uses ranges for get_immrbase().
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reg = <0xf0000000 0x53000>;
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cpm@119c0 {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
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reg = <0x119c0 0x30>;
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ranges;
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muram@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x0 0x10000>;
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data@0 {
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compatible = "fsl,cpm-muram-data";
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reg = <0x0 0x2000 0x9800 0x800>;
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};
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};
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brg@119f0 {
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compatible = "fsl,mpc8280-brg",
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"fsl,cpm2-brg",
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"fsl,cpm-brg";
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reg = <0x119f0 0x10 0x115f0 0x10>;
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};
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serial0: serial@11a00 {
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device_type = "serial";
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compatible = "fsl,mpc8280-scc-uart",
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"fsl,cpm2-scc-uart";
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reg = <0x11a00 0x20 0x8000 0x100>;
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interrupts = <40 8>;
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interrupt-parent = <&PIC>;
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fsl,cpm-brg = <1>;
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fsl,cpm-command = <0x800000>;
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};
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serial1: serial@11a20 {
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device_type = "serial";
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compatible = "fsl,mpc8280-scc-uart",
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"fsl,cpm2-scc-uart";
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reg = <0x11a20 0x20 0x8100 0x100>;
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interrupts = <41 8>;
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interrupt-parent = <&PIC>;
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fsl,cpm-brg = <2>;
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fsl,cpm-command = <0x4a00000>;
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};
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enet0: ethernet@11320 {
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device_type = "network";
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compatible = "fsl,mpc8280-fcc-enet",
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"fsl,cpm2-fcc-enet";
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reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
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interrupts = <33 8>;
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interrupt-parent = <&PIC>;
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phy-handle = <&PHY0>;
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linux,network-index = <0>;
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fsl,cpm-command = <0x16200300>;
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};
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enet1: ethernet@11340 {
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device_type = "network";
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compatible = "fsl,mpc8280-fcc-enet",
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"fsl,cpm2-fcc-enet";
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reg = <0x11340 0x20 0x8600 0x100 0x113d0 0x1>;
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interrupts = <34 8>;
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interrupt-parent = <&PIC>;
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phy-handle = <&PHY1>;
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linux,network-index = <1>;
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fsl,cpm-command = <0x1a400300>;
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local-mac-address = [00 e0 0c 00 79 01];
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};
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mdio@10d40 {
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compatible = "fsl,pq2fads-mdio-bitbang",
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"fsl,mpc8280-mdio-bitbang",
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"fsl,cpm2-mdio-bitbang";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x10d40 0x14>;
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fsl,mdio-pin = <9>;
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fsl,mdc-pin = <10>;
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PHY0: ethernet-phy@0 {
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interrupt-parent = <&PIC>;
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interrupts = <25 2>;
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reg = <0x0>;
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};
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PHY1: ethernet-phy@1 {
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interrupt-parent = <&PIC>;
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interrupts = <25 2>;
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reg = <0x3>;
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};
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};
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usb@11b60 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,mpc8280-usb",
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"fsl,cpm2-usb";
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reg = <0x11b60 0x18 0x8b00 0x100>;
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interrupt-parent = <&PIC>;
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interrupts = <11 8>;
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fsl,cpm-command = <0x2e600000>;
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};
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};
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PIC: interrupt-controller@10c00 {
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0x10c00 0x80>;
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compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic";
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};
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};
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chosen {
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stdout-path = "/soc/cpm/serial@11a00";
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};
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};
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@ -38,7 +38,6 @@ CONFIG_PPC_MPC52xx=y
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CONFIG_PPC_EFIKA=y
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CONFIG_PPC_EFIKA=y
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CONFIG_PPC_MPC5200_BUGFIX=y
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CONFIG_PPC_MPC5200_BUGFIX=y
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CONFIG_PPC_82xx=y
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CONFIG_PPC_82xx=y
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CONFIG_PQ2FADS=y
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CONFIG_EP8248E=y
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CONFIG_EP8248E=y
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CONFIG_MGCOGE=y
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CONFIG_MGCOGE=y
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CONFIG_PPC_83xx=y
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CONFIG_PPC_83xx=y
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@ -1,80 +0,0 @@
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CONFIG_SYSVIPC=y
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CONFIG_NO_HZ=y
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CONFIG_HIGH_RES_TIMERS=y
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CONFIG_IKCONFIG=y
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CONFIG_IKCONFIG_PROC=y
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CONFIG_LOG_BUF_SHIFT=14
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_EXPERT=y
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CONFIG_KALLSYMS_ALL=y
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CONFIG_PARTITION_ADVANCED=y
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# CONFIG_PPC_CHRP is not set
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# CONFIG_PPC_PMAC is not set
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CONFIG_PPC_82xx=y
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CONFIG_PQ2FADS=y
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CONFIG_BINFMT_MISC=y
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CONFIG_PCI=y
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CONFIG_NET=y
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CONFIG_PACKET=y
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CONFIG_UNIX=y
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CONFIG_INET=y
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CONFIG_IP_MULTICAST=y
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CONFIG_IP_PNP=y
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CONFIG_IP_PNP_DHCP=y
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CONFIG_IP_PNP_BOOTP=y
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CONFIG_SYN_COOKIES=y
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CONFIG_NETFILTER=y
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# CONFIG_FW_LOADER is not set
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CONFIG_MTD=y
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CONFIG_MTD_BLOCK=y
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CONFIG_MTD_JEDECPROBE=y
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CONFIG_MTD_CFI_ADV_OPTIONS=y
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CONFIG_MTD_CFI_GEOMETRY=y
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# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
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# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set
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# CONFIG_MTD_CFI_I1 is not set
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# CONFIG_MTD_CFI_I2 is not set
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CONFIG_MTD_CFI_I4=y
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CONFIG_MTD_CFI_INTELEXT=y
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CONFIG_MTD_PHYSMAP_OF=y
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CONFIG_BLK_DEV_LOOP=y
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CONFIG_NETDEVICES=y
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CONFIG_TUN=y
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CONFIG_FS_ENET=y
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# CONFIG_FS_ENET_HAS_SCC is not set
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CONFIG_FS_ENET_MDIO_FCC=y
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CONFIG_DAVICOM_PHY=y
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CONFIG_PPP=y
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CONFIG_PPP_DEFLATE=y
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CONFIG_PPP_ASYNC=y
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CONFIG_PPP_SYNC_TTY=y
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CONFIG_INPUT_EVDEV=y
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# CONFIG_VT is not set
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CONFIG_SERIAL_CPM=y
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CONFIG_SERIAL_CPM_CONSOLE=y
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# CONFIG_HWMON is not set
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CONFIG_USB_GADGET=y
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CONFIG_USB_ETH=y
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CONFIG_EXT2_FS=y
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CONFIG_EXT4_FS=y
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CONFIG_AUTOFS4_FS=y
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CONFIG_PROC_KCORE=y
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CONFIG_TMPFS=y
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CONFIG_CRAMFS=y
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CONFIG_NFS_FS=y
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CONFIG_NFS_V3_ACL=y
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CONFIG_ROOT_NFS=y
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CONFIG_NLS_CODEPAGE_437=y
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CONFIG_NLS_ASCII=y
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CONFIG_NLS_ISO8859_1=y
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CONFIG_NLS_UTF8=y
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CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
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CONFIG_MAGIC_SYSRQ=y
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CONFIG_DETECT_HUNG_TASK=y
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# CONFIG_SCHED_DEBUG is not set
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CONFIG_BDI_SWITCH=y
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CONFIG_CRYPTO_CBC=y
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CONFIG_CRYPTO_ECB=y
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CONFIG_CRYPTO_PCBC=y
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CONFIG_CRYPTO_MD5=y
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CONFIG_CRYPTO_DES=y
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@ -5,16 +5,6 @@ menuconfig PPC_82xx
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if PPC_82xx
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if PPC_82xx
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config PQ2FADS
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bool "Freescale PQ2FADS"
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select DEFAULT_UIMAGE
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select PQ2ADS
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select 8260
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select FSL_SOC
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select PQ2_ADS_PCI_PIC if PCI
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help
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This option enables support for the PQ2FADS board
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config EP8248E
|
config EP8248E
|
||||||
bool "Embedded Planet EP8248E (a.k.a. CWH-PPC-8248N-VE)"
|
bool "Embedded Planet EP8248E (a.k.a. CWH-PPC-8248N-VE)"
|
||||||
select 8272
|
select 8272
|
||||||
|
|||||||
@ -4,6 +4,5 @@
|
|||||||
#
|
#
|
||||||
obj-$(CONFIG_CPM2) += pq2.o
|
obj-$(CONFIG_CPM2) += pq2.o
|
||||||
obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o
|
obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o
|
||||||
obj-$(CONFIG_PQ2FADS) += pq2fads.o
|
|
||||||
obj-$(CONFIG_EP8248E) += ep8248e.o
|
obj-$(CONFIG_EP8248E) += ep8248e.o
|
||||||
obj-$(CONFIG_MGCOGE) += km82xx.o
|
obj-$(CONFIG_MGCOGE) += km82xx.o
|
||||||
|
|||||||
@ -1,182 +0,0 @@
|
|||||||
// SPDX-License-Identifier: GPL-2.0-only
|
|
||||||
/*
|
|
||||||
* PQ2FADS board support
|
|
||||||
*
|
|
||||||
* Copyright 2007 Freescale Semiconductor, Inc.
|
|
||||||
* Author: Scott Wood <scottwood@freescale.com>
|
|
||||||
*
|
|
||||||
* Loosely based on mp82xx ADS support by Vitaly Bordug <vbordug@ru.mvista.com>
|
|
||||||
* Copyright (c) 2006 MontaVista Software, Inc.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <linux/init.h>
|
|
||||||
#include <linux/interrupt.h>
|
|
||||||
#include <linux/fsl_devices.h>
|
|
||||||
#include <linux/of_address.h>
|
|
||||||
#include <linux/of_fdt.h>
|
|
||||||
#include <linux/of_platform.h>
|
|
||||||
|
|
||||||
#include <asm/io.h>
|
|
||||||
#include <asm/cpm2.h>
|
|
||||||
#include <asm/udbg.h>
|
|
||||||
#include <asm/machdep.h>
|
|
||||||
#include <asm/time.h>
|
|
||||||
|
|
||||||
#include <sysdev/fsl_soc.h>
|
|
||||||
#include <sysdev/cpm2_pic.h>
|
|
||||||
|
|
||||||
#include "pq2ads.h"
|
|
||||||
#include "pq2.h"
|
|
||||||
|
|
||||||
static void __init pq2fads_pic_init(void)
|
|
||||||
{
|
|
||||||
struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
|
|
||||||
if (!np) {
|
|
||||||
printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
cpm2_pic_init(np);
|
|
||||||
of_node_put(np);
|
|
||||||
|
|
||||||
/* Initialize stuff for the 82xx CPLD IC and install demux */
|
|
||||||
pq2ads_pci_init_irq();
|
|
||||||
}
|
|
||||||
|
|
||||||
struct cpm_pin {
|
|
||||||
int port, pin, flags;
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct cpm_pin pq2fads_pins[] = {
|
|
||||||
/* SCC1 */
|
|
||||||
{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
|
|
||||||
{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
|
|
||||||
/* SCC2 */
|
|
||||||
{3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
||||||
{3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
|
|
||||||
/* FCC2 */
|
|
||||||
{1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
|
|
||||||
{1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
||||||
{2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
|
|
||||||
/* FCC3 */
|
|
||||||
{1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
{2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
||||||
};
|
|
||||||
|
|
||||||
static void __init init_ioports(void)
|
|
||||||
{
|
|
||||||
int i;
|
|
||||||
|
|
||||||
for (i = 0; i < ARRAY_SIZE(pq2fads_pins); i++) {
|
|
||||||
struct cpm_pin *pin = &pq2fads_pins[i];
|
|
||||||
cpm2_set_pin(pin->port, pin->pin, pin->flags);
|
|
||||||
}
|
|
||||||
|
|
||||||
cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
|
|
||||||
cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
|
|
||||||
cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
|
|
||||||
cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
|
|
||||||
cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
|
|
||||||
cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
|
|
||||||
cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
|
|
||||||
cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void __init pq2fads_setup_arch(void)
|
|
||||||
{
|
|
||||||
struct device_node *np;
|
|
||||||
__be32 __iomem *bcsr;
|
|
||||||
|
|
||||||
if (ppc_md.progress)
|
|
||||||
ppc_md.progress("pq2fads_setup_arch()", 0);
|
|
||||||
|
|
||||||
cpm2_reset();
|
|
||||||
|
|
||||||
np = of_find_compatible_node(NULL, NULL, "fsl,pq2fads-bcsr");
|
|
||||||
if (!np) {
|
|
||||||
printk(KERN_ERR "No fsl,pq2fads-bcsr in device tree\n");
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
bcsr = of_iomap(np, 0);
|
|
||||||
of_node_put(np);
|
|
||||||
if (!bcsr) {
|
|
||||||
printk(KERN_ERR "Cannot map BCSR registers\n");
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Enable the serial and ethernet ports */
|
|
||||||
|
|
||||||
clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN);
|
|
||||||
setbits32(&bcsr[1], BCSR1_FETH_RST);
|
|
||||||
|
|
||||||
clrbits32(&bcsr[3], BCSR3_FETHIEN2);
|
|
||||||
setbits32(&bcsr[3], BCSR3_FETH2_RST);
|
|
||||||
|
|
||||||
iounmap(bcsr);
|
|
||||||
|
|
||||||
init_ioports();
|
|
||||||
|
|
||||||
/* Enable external IRQs */
|
|
||||||
clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_siumcr, 0x0c000000);
|
|
||||||
|
|
||||||
if (ppc_md.progress)
|
|
||||||
ppc_md.progress("pq2fads_setup_arch(), finish", 0);
|
|
||||||
}
|
|
||||||
|
|
||||||
static const struct of_device_id of_bus_ids[] __initconst = {
|
|
||||||
{ .name = "soc", },
|
|
||||||
{ .name = "cpm", },
|
|
||||||
{ .name = "localbus", },
|
|
||||||
{},
|
|
||||||
};
|
|
||||||
|
|
||||||
static int __init declare_of_platform_devices(void)
|
|
||||||
{
|
|
||||||
/* Publish the QE devices */
|
|
||||||
of_platform_bus_probe(NULL, of_bus_ids, NULL);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
machine_device_initcall(pq2fads, declare_of_platform_devices);
|
|
||||||
|
|
||||||
define_machine(pq2fads)
|
|
||||||
{
|
|
||||||
.name = "Freescale PQ2FADS",
|
|
||||||
.compatible = "fsl,pq2fads",
|
|
||||||
.setup_arch = pq2fads_setup_arch,
|
|
||||||
.discover_phbs = pq2_init_pci,
|
|
||||||
.init_IRQ = pq2fads_pic_init,
|
|
||||||
.get_irq = cpm2_get_irq,
|
|
||||||
.restart = pq2_restart,
|
|
||||||
.progress = udbg_progress,
|
|
||||||
};
|
|
||||||
Loading…
x
Reference in New Issue
Block a user