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clk: renesas: r8a77980: Add Z2 clock

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Add support for the Z2 (Cortex-A53 System CPU) clock on R-Car V3H, which
uses a fixed SYS-CPU divider.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/aad9eaa57acf65cbe43e4d374066a72d760d54d8.1676560357.git.geert+renesas@glider.be
This commit is contained in:
Geert Uytterhoeven 2023-02-16 16:20:19 +01:00
parent 88ddf98aa5
commit 85af88b8f7
1 changed files with 1 additions and 0 deletions
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drivers/clk/renesas/r8a77980-cpg-mssr.c
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@ -72,6 +72,7 @@ static const struct cpg_core_clk r8a77980_core_clks[] __initconst = {
DEF_RATE(".oco", CLK_OCO, 32768),
/* Core Clock Outputs */
DEF_FIXED("z2", R8A77980_CLK_Z2, CLK_PLL2, 4, 1),
DEF_FIXED("ztr", R8A77980_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
DEF_FIXED("ztrd2", R8A77980_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
DEF_FIXED("zt", R8A77980_CLK_ZT, CLK_PLL1_DIV2, 4, 1),