Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle: "Eight fixes across arch/mips. Nothing stands particuarly out nor is complicated but fixes keep coming in at a higher than comfortable rate" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: KVM: Do not sign extend on unsigned MMIO load MIPS: BPF: Fix stack pointer allocation MIPS: Loongson-3: Fix a cpu-hotplug issue in loongson3_ipi_interrupt() MIPS: Fix enabling of DEBUG_STACKOVERFLOW MIPS: c-r4k: Fix typo in probe_scache() MIPS: Avoid an FPE exception in FCSR mask probing MIPS: ath79: Add a missing new line in log message MIPS: ralink: Fix clearing the illegal access interrupt
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commit
866e6441a4
@ -225,7 +225,7 @@ void __init plat_time_init(void)
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ddr_clk_rate = ath79_get_sys_clk_rate("ddr");
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ref_clk_rate = ath79_get_sys_clk_rate("ref");
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pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz",
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pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz\n",
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cpu_clk_rate / 1000000, (cpu_clk_rate / 1000) % 1000,
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ddr_clk_rate / 1000000, (ddr_clk_rate / 1000) % 1000,
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ahb_clk_rate / 1000000, (ahb_clk_rate / 1000) % 1000,
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@ -74,13 +74,12 @@ static inline void cpu_set_fpu_fcsr_mask(struct cpuinfo_mips *c)
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{
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unsigned long sr, mask, fcsr, fcsr0, fcsr1;
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fcsr = c->fpu_csr31;
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mask = FPU_CSR_ALL_X | FPU_CSR_ALL_E | FPU_CSR_ALL_S | FPU_CSR_RM;
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sr = read_c0_status();
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__enable_fpu(FPU_AS_IS);
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fcsr = read_32bit_cp1_register(CP1_STATUS);
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fcsr0 = fcsr & mask;
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write_32bit_cp1_register(CP1_STATUS, fcsr0);
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fcsr0 = read_32bit_cp1_register(CP1_STATUS);
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@ -109,7 +109,7 @@ void __init init_IRQ(void)
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#endif
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}
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#ifdef DEBUG_STACKOVERFLOW
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#ifdef CONFIG_DEBUG_STACKOVERFLOW
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static inline void check_stack_overflow(void)
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{
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unsigned long sp;
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@ -2409,7 +2409,7 @@ enum emulation_result kvm_mips_complete_mmio_load(struct kvm_vcpu *vcpu,
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if (vcpu->mmio_needed == 2)
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*gpr = *(int16_t *) run->mmio.data;
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else
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*gpr = *(int16_t *) run->mmio.data;
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*gpr = *(uint16_t *)run->mmio.data;
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break;
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case 1:
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@ -272,7 +272,7 @@ void loongson3_ipi_interrupt(struct pt_regs *regs)
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if (action & SMP_ASK_C0COUNT) {
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BUG_ON(cpu != 0);
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c0count = read_c0_count();
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for (i = 1; i < loongson_sysconf.nr_cpus; i++)
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for (i = 1; i < num_possible_cpus(); i++)
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per_cpu(core0_c0count, i) = c0count;
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}
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}
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@ -1372,7 +1372,7 @@ static int probe_scache(void)
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scache_size = addr;
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c->scache.linesz = 16 << ((config & R4K_CONF_SB) >> 22);
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c->scache.ways = 1;
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c->dcache.waybit = 0; /* does not matter */
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c->scache.waybit = 0; /* does not matter */
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return 1;
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}
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@ -681,11 +681,7 @@ static unsigned int get_stack_depth(struct jit_ctx *ctx)
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sp_off += config_enabled(CONFIG_64BIT) ?
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(ARGS_USED_BY_JIT + 1) * RSIZE : RSIZE;
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/*
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* Subtract the bytes for the last registers since we only care about
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* the location on the stack pointer.
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*/
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return sp_off - RSIZE;
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return sp_off;
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}
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static void build_prologue(struct jit_ctx *ctx)
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@ -41,7 +41,7 @@ static irqreturn_t ill_acc_irq_handler(int irq, void *_priv)
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addr, (type >> ILL_ACC_OFF_S) & ILL_ACC_OFF_M,
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type & ILL_ACC_LEN_M);
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rt_memc_w32(REG_ILL_ACC_TYPE, REG_ILL_ACC_TYPE);
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rt_memc_w32(ILL_INT_STATUS, REG_ILL_ACC_TYPE);
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return IRQ_HANDLED;
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}
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