PCI: dwc: ep: Add a generic dw_pcie_ep_linkdown() API to handle Link Down event
Per PCIe r6.0, sec 5.2, a Link Down event can happen under any of the following circumstances: 1. Fundamental/Hot reset 2. Link disable transmission by upstream component 3. Moving from L2/L3 to L0 In those cases, Link Down causes some non-sticky DWC registers to lose the state (like REBAR, etc.), so drivers need to reinitialize them to function properly once the link comes back again. This is not a problem for drivers supporting PERST# IRQ, since they can reinitialize the registers in the PERST# IRQ callback. But for the drivers not supporting PERST#, there is no way they can reinitialize the registers other than relying on Link Down IRQ received when the link goes down. So add a DWC generic API dw_pcie_ep_linkdown() that reinitializes the non-sticky registers and also notifies the EPF drivers about link going down. This API can also be used by the drivers supporting PERST# to handle the scenario (2) mentioned above. NOTE: For the sake of code organization, move the dw_pcie_ep_linkup() definition just above dw_pcie_ep_linkdown(). Link: https://lore.kernel.org/linux-pci/20240430-pci-epf-rework-v4-8-22832d0d456f@linaro.org Tested-by: Niklas Cassel <cassel@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> [bhelgaas: update spec citation] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Niklas Cassel <cassel@kernel.org>
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@ -15,18 +15,6 @@
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#include <linux/pci-epc.h>
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#include <linux/pci-epf.h>
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/**
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* dw_pcie_ep_linkup - Notify EPF drivers about Link Up event
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* @ep: DWC EP device
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*/
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void dw_pcie_ep_linkup(struct dw_pcie_ep *ep)
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{
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struct pci_epc *epc = ep->epc;
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pci_epc_linkup(epc);
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}
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EXPORT_SYMBOL_GPL(dw_pcie_ep_linkup);
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/**
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* dw_pcie_ep_init_notify - Notify EPF drivers about EPC initialization complete
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* @ep: DWC EP device
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@ -685,6 +673,34 @@ static unsigned int dw_pcie_ep_find_ext_capability(struct dw_pcie *pci, int cap)
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return 0;
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}
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static void dw_pcie_ep_init_non_sticky_registers(struct dw_pcie *pci)
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{
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unsigned int offset;
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unsigned int nbars;
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u32 reg, i;
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offset = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_REBAR);
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dw_pcie_dbi_ro_wr_en(pci);
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if (offset) {
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reg = dw_pcie_readl_dbi(pci, offset + PCI_REBAR_CTRL);
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nbars = (reg & PCI_REBAR_CTRL_NBAR_MASK) >>
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PCI_REBAR_CTRL_NBAR_SHIFT;
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/*
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* PCIe r6.0, sec 7.8.6.2 require us to support at least one
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* size in the range from 1 MB to 512 GB. Advertise support
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* for 1 MB BAR size only.
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*/
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for (i = 0; i < nbars; i++, offset += PCI_REBAR_CTRL)
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dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, 0x0);
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}
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dw_pcie_setup(pci);
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dw_pcie_dbi_ro_wr_dis(pci);
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}
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/**
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* dw_pcie_ep_init_registers - Initialize DWC EP specific registers
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* @ep: DWC EP device
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@ -699,13 +715,11 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep)
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struct dw_pcie_ep_func *ep_func;
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struct device *dev = pci->dev;
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struct pci_epc *epc = ep->epc;
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unsigned int offset, ptm_cap_base;
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unsigned int nbars;
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u32 ptm_cap_base, reg;
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u8 hdr_type;
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u8 func_no;
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int i, ret;
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void *addr;
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u32 reg;
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int ret;
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hdr_type = dw_pcie_readb_dbi(pci, PCI_HEADER_TYPE) &
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PCI_HEADER_TYPE_MASK;
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@ -768,25 +782,8 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep)
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if (ep->ops->init)
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ep->ops->init(ep);
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offset = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_REBAR);
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ptm_cap_base = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_PTM);
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dw_pcie_dbi_ro_wr_en(pci);
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if (offset) {
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reg = dw_pcie_readl_dbi(pci, offset + PCI_REBAR_CTRL);
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nbars = (reg & PCI_REBAR_CTRL_NBAR_MASK) >>
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PCI_REBAR_CTRL_NBAR_SHIFT;
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/*
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* PCIe r6.0, sec 7.8.6.2 require us to support at least one
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* size in the range from 1 MB to 512 GB. Advertise support
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* for 1 MB BAR size only.
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*/
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for (i = 0; i < nbars; i++, offset += PCI_REBAR_CTRL)
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dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, BIT(4));
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}
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/*
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* PTM responder capability can be disabled only after disabling
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* PTM root capability.
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@ -803,8 +800,7 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep)
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dw_pcie_dbi_ro_wr_dis(pci);
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}
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dw_pcie_setup(pci);
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dw_pcie_dbi_ro_wr_dis(pci);
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dw_pcie_ep_init_non_sticky_registers(pci);
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return 0;
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@ -815,6 +811,43 @@ err_remove_edma:
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}
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EXPORT_SYMBOL_GPL(dw_pcie_ep_init_registers);
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/**
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* dw_pcie_ep_linkup - Notify EPF drivers about Link Up event
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* @ep: DWC EP device
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*/
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void dw_pcie_ep_linkup(struct dw_pcie_ep *ep)
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{
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struct pci_epc *epc = ep->epc;
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pci_epc_linkup(epc);
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}
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EXPORT_SYMBOL_GPL(dw_pcie_ep_linkup);
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/**
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* dw_pcie_ep_linkdown - Notify EPF drivers about Link Down event
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* @ep: DWC EP device
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*
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* Non-sticky registers are also initialized before sending the notification to
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* the EPF drivers. This is needed since the registers need to be initialized
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* before the link comes back again.
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*/
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void dw_pcie_ep_linkdown(struct dw_pcie_ep *ep)
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{
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struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
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struct pci_epc *epc = ep->epc;
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/*
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* Initialize the non-sticky DWC registers as they would've reset post
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* Link Down. This is specifically needed for drivers not supporting
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* PERST# as they have no way to reinitialize the registers before the
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* link comes back again.
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*/
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dw_pcie_ep_init_non_sticky_registers(pci);
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pci_epc_linkdown(epc);
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}
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EXPORT_SYMBOL_GPL(dw_pcie_ep_linkdown);
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/**
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* dw_pcie_ep_init - Initialize the endpoint device
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* @ep: DWC EP device
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@ -681,6 +681,7 @@ static inline void __iomem *dw_pcie_own_conf_map_bus(struct pci_bus *bus,
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#ifdef CONFIG_PCIE_DW_EP
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void dw_pcie_ep_linkup(struct dw_pcie_ep *ep);
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void dw_pcie_ep_linkdown(struct dw_pcie_ep *ep);
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int dw_pcie_ep_init(struct dw_pcie_ep *ep);
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int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep);
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void dw_pcie_ep_init_notify(struct dw_pcie_ep *ep);
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@ -701,6 +702,10 @@ static inline void dw_pcie_ep_linkup(struct dw_pcie_ep *ep)
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{
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}
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static inline void dw_pcie_ep_linkdown(struct dw_pcie_ep *ep)
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{
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}
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static inline int dw_pcie_ep_init(struct dw_pcie_ep *ep)
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{
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return 0;
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