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Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

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* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, mce: don't restart timer if disabled
  x86: Use -maccumulate-outgoing-args for sane mcount prologues
  x86: Prevent GCC 4.4.x (pentium-mmx et al) function prologue wreckage
  x86: AMD Northbridge: Verify NB's node is online
  x86 VSDO: Fix Kconfig help
  x86: Fix typo in Intel CPU cache size descriptor
  x86: Add new Intel CPU cache size descriptors
This commit is contained in:
Linus Torvalds 2009-12-08 13:38:11 -08:00
commit 86ed4aa457
5 changed files with 24 additions and 5 deletions
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2
arch/x86/Kconfig
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@ -1607,7 +1607,7 @@ config COMPAT_VDSO
depends on X86_32 || IA32_EMULATION depends on X86_32 || IA32_EMULATION
---help--- ---help---
Map the 32-bit VDSO to the predictable old-style address too. Map the 32-bit VDSO to the predictable old-style address too.
---help---
Say N here if you are running a sufficiently recent glibc Say N here if you are running a sufficiently recent glibc
version (2.3.3 or later), to remove the high-mapped version (2.3.3 or later), to remove the high-mapped
VDSO mapping and to exclusively use the randomized VDSO. VDSO mapping and to exclusively use the randomized VDSO.

7
arch/x86/Makefile_32.cpu
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@ -46,6 +46,13 @@ cflags-$(CONFIG_MGEODE_LX) += $(call cc-option,-march=geode,-march=pentium-mmx)
# cpu entries # cpu entries
cflags-$(CONFIG_X86_GENERIC) += $(call tune,generic,$(call tune,i686)) cflags-$(CONFIG_X86_GENERIC) += $(call tune,generic,$(call tune,i686))
# Work around the pentium-mmx code generator madness of gcc4.4.x which
# does stack alignment by generating horrible code _before_ the mcount
# prologue (push %ebp, mov %esp, %ebp) which breaks the function graph
# tracer assumptions. For i686, generic, core2 this is set by the
# compiler anyway
cflags-$(CONFIG_FUNCTION_GRAPH_TRACER) += $(call cc-option,-maccumulate-outgoing-args)
# Bug fix for binutils: this option is required in order to keep # Bug fix for binutils: this option is required in order to keep
# binutils from generating NOPL instructions against our will. # binutils from generating NOPL instructions against our will.
ifneq ($(CONFIG_X86_P6_NOP),y) ifneq ($(CONFIG_X86_P6_NOP),y)

5
arch/x86/kernel/cpu/intel_cacheinfo.c
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@ -94,7 +94,7 @@ static const struct _cache_table __cpuinitconst cache_table[] =
{ 0xd1, LVL_3, 1024 }, /* 4-way set assoc, 64 byte line size */ { 0xd1, LVL_3, 1024 }, /* 4-way set assoc, 64 byte line size */
{ 0xd2, LVL_3, 2048 }, /* 4-way set assoc, 64 byte line size */ { 0xd2, LVL_3, 2048 }, /* 4-way set assoc, 64 byte line size */
{ 0xd6, LVL_3, 1024 }, /* 8-way set assoc, 64 byte line size */ { 0xd6, LVL_3, 1024 }, /* 8-way set assoc, 64 byte line size */
{ 0xd7, LVL_3, 2038 }, /* 8-way set assoc, 64 byte line size */ { 0xd7, LVL_3, 2048 }, /* 8-way set assoc, 64 byte line size */
{ 0xd8, LVL_3, 4096 }, /* 12-way set assoc, 64 byte line size */ { 0xd8, LVL_3, 4096 }, /* 12-way set assoc, 64 byte line size */
{ 0xdc, LVL_3, 2048 }, /* 12-way set assoc, 64 byte line size */ { 0xdc, LVL_3, 2048 }, /* 12-way set assoc, 64 byte line size */
{ 0xdd, LVL_3, 4096 }, /* 12-way set assoc, 64 byte line size */ { 0xdd, LVL_3, 4096 }, /* 12-way set assoc, 64 byte line size */
@ -102,6 +102,9 @@ static const struct _cache_table __cpuinitconst cache_table[] =
{ 0xe2, LVL_3, 2048 }, /* 16-way set assoc, 64 byte line size */ { 0xe2, LVL_3, 2048 }, /* 16-way set assoc, 64 byte line size */
{ 0xe3, LVL_3, 4096 }, /* 16-way set assoc, 64 byte line size */ { 0xe3, LVL_3, 4096 }, /* 16-way set assoc, 64 byte line size */
{ 0xe4, LVL_3, 8192 }, /* 16-way set assoc, 64 byte line size */ { 0xe4, LVL_3, 8192 }, /* 16-way set assoc, 64 byte line size */
{ 0xea, LVL_3, 12288 }, /* 24-way set assoc, 64 byte line size */
{ 0xeb, LVL_3, 18432 }, /* 24-way set assoc, 64 byte line size */
{ 0xec, LVL_3, 24576 }, /* 24-way set assoc, 64 byte line size */
{ 0x00, 0, 0} { 0x00, 0, 0}
}; };

6
arch/x86/kernel/cpu/mcheck/mce.c
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@ -2016,9 +2016,11 @@ mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
break; break;
case CPU_DOWN_FAILED: case CPU_DOWN_FAILED:
case CPU_DOWN_FAILED_FROZEN: case CPU_DOWN_FAILED_FROZEN:
t->expires = round_jiffies(jiffies + if (!mce_ignore_ce && check_interval) {
t->expires = round_jiffies(jiffies +
__get_cpu_var(mce_next_interval)); __get_cpu_var(mce_next_interval));
add_timer_on(t, cpu); add_timer_on(t, cpu);
}
smp_call_function_single(cpu, mce_reenable_cpu, &action, 1); smp_call_function_single(cpu, mce_reenable_cpu, &action, 1);
break; break;
case CPU_POST_DEAD: case CPU_POST_DEAD:

9
arch/x86/kernel/quirks.c
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@ -499,6 +499,7 @@ static void __init quirk_amd_nb_node(struct pci_dev *dev)
{ {
struct pci_dev *nb_ht; struct pci_dev *nb_ht;
unsigned int devfn; unsigned int devfn;
u32 node;
u32 val; u32 val;
devfn = PCI_DEVFN(PCI_SLOT(dev->devfn), 0); devfn = PCI_DEVFN(PCI_SLOT(dev->devfn), 0);
@ -507,7 +508,13 @@ static void __init quirk_amd_nb_node(struct pci_dev *dev)
return; return;
pci_read_config_dword(nb_ht, 0x60, &val); pci_read_config_dword(nb_ht, 0x60, &val);
set_dev_node(&dev->dev, val & 7); node = val & 7;
/*
* Some hardware may return an invalid node ID,
* so check it first:
*/
if (node_online(node))
set_dev_node(&dev->dev, node);
pci_dev_put(nb_ht); pci_dev_put(nb_ht);
} }