ath5k: MRR support and 2GHz radio override belong in ah_capabilities
MRR support and 2GHz radio override belong in ah_capabilities and we should use them (e.g. so far we used to set mrr descriptor without checking if MRR support is enabled + we checked for MRR support 2 times, one by trying to set up an MRR descriptor and another one based on MAC version). Signed-off-by: Nick Kossifidis <mickflemm@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -166,7 +166,9 @@ static int ath_ahb_probe(struct platform_device *pdev)
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if (to_platform_device(ah->dev)->id == 0 &&
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(bcfg->config->flags & (BD_WLAN0 | BD_WLAN1)) ==
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(BD_WLAN1 | BD_WLAN0))
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__set_bit(ATH_STAT_2G_DISABLED, ah->status);
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ah->ah_capabilities.cap_needs_2GHz_ovr = true;
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else
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ah->ah_capabilities.cap_needs_2GHz_ovr = false;
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}
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ret = ath5k_init_ah(ah, &ath_ahb_bus_ops);
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@ -1159,6 +1159,8 @@ struct ath5k_capabilities {
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} cap_queues;
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bool cap_has_phyerr_counters;
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bool cap_has_mrr_support;
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bool cap_needs_2GHz_ovr;
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};
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/* size of noise floor history (keep it a power of two) */
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@ -1274,13 +1276,11 @@ struct ath5k_hw {
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dma_addr_t desc_daddr; /* DMA (physical) address */
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size_t desc_len; /* size of TX/RX descriptors */
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DECLARE_BITMAP(status, 6);
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DECLARE_BITMAP(status, 4);
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#define ATH_STAT_INVALID 0 /* disable hardware accesses */
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#define ATH_STAT_MRRETRY 1 /* multi-rate retry support */
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#define ATH_STAT_PROMISC 2
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#define ATH_STAT_LEDSOFT 3 /* enable LED gpio status */
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#define ATH_STAT_STARTED 4 /* opened & irqs enabled */
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#define ATH_STAT_2G_DISABLED 5 /* multiband radio without 2G */
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#define ATH_STAT_PROMISC 1
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#define ATH_STAT_LEDSOFT 2 /* enable LED gpio status */
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#define ATH_STAT_STARTED 3 /* opened & irqs enabled */
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unsigned int filter_flags; /* HW flags, AR5K_RX_FILTER_* */
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struct ieee80211_channel *curchan; /* current h/w channel */
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@ -306,11 +306,6 @@ int ath5k_hw_init(struct ath5k_hw *ah)
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goto err;
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}
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if (test_bit(ATH_STAT_2G_DISABLED, ah->status)) {
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__clear_bit(AR5K_MODE_11B, ah->ah_capabilities.cap_mode);
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__clear_bit(AR5K_MODE_11G, ah->ah_capabilities.cap_mode);
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}
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/* Crypto settings */
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common->keymax = (ah->ah_version == AR5K_AR5210 ?
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AR5K_KEYTABLE_SIZE_5210 : AR5K_KEYTABLE_SIZE_5211);
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@ -725,22 +725,25 @@ ath5k_txbuf_setup(struct ath5k_hw *ah, struct ath5k_buf *bf,
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if (ret)
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goto err_unmap;
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memset(mrr_rate, 0, sizeof(mrr_rate));
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memset(mrr_tries, 0, sizeof(mrr_tries));
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for (i = 0; i < 3; i++) {
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rate = ieee80211_get_alt_retry_rate(ah->hw, info, i);
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if (!rate)
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break;
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/* Set up MRR descriptor */
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if (ah->ah_capabilities.cap_has_mrr_support) {
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memset(mrr_rate, 0, sizeof(mrr_rate));
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memset(mrr_tries, 0, sizeof(mrr_tries));
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for (i = 0; i < 3; i++) {
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rate = ieee80211_get_alt_retry_rate(ah->hw, info, i);
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if (!rate)
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break;
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mrr_rate[i] = rate->hw_value;
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mrr_tries[i] = info->control.rates[i + 1].count;
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mrr_rate[i] = rate->hw_value;
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mrr_tries[i] = info->control.rates[i + 1].count;
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}
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ath5k_hw_setup_mrr_tx_desc(ah, ds,
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mrr_rate[0], mrr_tries[0],
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mrr_rate[1], mrr_tries[1],
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mrr_rate[2], mrr_tries[2]);
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}
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ath5k_hw_setup_mrr_tx_desc(ah, ds,
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mrr_rate[0], mrr_tries[0],
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mrr_rate[1], mrr_tries[1],
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mrr_rate[2], mrr_tries[2]);
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ds->ds_link = 0;
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ds->ds_data = bf->skbaddr;
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@ -2489,8 +2492,8 @@ ath5k_init_ah(struct ath5k_hw *ah, const struct ath_bus_ops *bus_ops)
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if (ret)
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goto err_irq;
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/* set up multi-rate retry capabilities */
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if (ah->ah_version == AR5K_AR5212) {
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/* Set up multi-rate retry capabilities */
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if (ah->ah_capabilities.cap_has_mrr_support) {
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hw->max_rates = 4;
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hw->max_rate_tries = max(AR5K_INIT_RETRY_SHORT,
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AR5K_INIT_RETRY_LONG);
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@ -2848,20 +2851,6 @@ ath5k_init(struct ieee80211_hw *hw)
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int ret;
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/*
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* Check if the MAC has multi-rate retry support.
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* We do this by trying to setup a fake extended
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* descriptor. MACs that don't have support will
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* return false w/o doing anything. MACs that do
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* support it will return true w/o doing anything.
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*/
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ret = ath5k_hw_setup_mrr_tx_desc(ah, NULL, 0, 0, 0, 0, 0, 0);
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if (ret < 0)
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goto err;
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if (ret > 0)
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__set_bit(ATH_STAT_MRRETRY, ah->status);
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/*
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* Collect the channel list. The 802.11 layer
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* is responsible for filtering this list based
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@ -85,12 +85,19 @@ int ath5k_hw_set_capabilities(struct ath5k_hw *ah)
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caps->cap_range.range_2ghz_min = 2412;
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caps->cap_range.range_2ghz_max = 2732;
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if (AR5K_EEPROM_HDR_11B(ee_header))
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__set_bit(AR5K_MODE_11B, caps->cap_mode);
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/* Override 2GHz modes on SoCs that need it
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* NOTE: cap_needs_2GHz_ovr gets set from
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* ath_ahb_probe */
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if (!caps->cap_needs_2GHz_ovr) {
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if (AR5K_EEPROM_HDR_11B(ee_header))
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__set_bit(AR5K_MODE_11B,
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caps->cap_mode);
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if (AR5K_EEPROM_HDR_11G(ee_header) &&
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ah->ah_version != AR5K_AR5211)
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__set_bit(AR5K_MODE_11G, caps->cap_mode);
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if (AR5K_EEPROM_HDR_11G(ee_header) &&
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ah->ah_version != AR5K_AR5211)
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__set_bit(AR5K_MODE_11G,
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caps->cap_mode);
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}
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}
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}
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@ -103,12 +110,18 @@ int ath5k_hw_set_capabilities(struct ath5k_hw *ah)
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else
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caps->cap_queues.q_tx_num = AR5K_NUM_TX_QUEUES;
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/* newer hardware has PHY error counters */
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/* Newer hardware has PHY error counters */
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if (ah->ah_mac_srev >= AR5K_SREV_AR5213A)
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caps->cap_has_phyerr_counters = true;
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else
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caps->cap_has_phyerr_counters = false;
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/* MACs since AR5212 have MRR support */
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if (ah->ah_version == AR5K_AR5212)
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caps->cap_has_mrr_support = true;
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else
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caps->cap_has_mrr_support = false;
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return 0;
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}
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