drm/amdgpu/vega10:timeout set to equal with VI
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -24,7 +24,7 @@
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#ifndef __MXGPU_AI_H__
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#define __MXGPU_AI_H__
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#define AI_MAILBOX_TIMEDOUT 150000
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#define AI_MAILBOX_TIMEDOUT 5000
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enum idh_request {
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IDH_REQ_GPU_INIT_ACCESS = 1,
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