drm/amdgpu: do not keep debugfs dentry
Cleanup unnecessary debugfs dentries and surrounding functions. v3: remove return value check for debugfs_create_file() v2: remove ttm_debugfs_entries array. do not init variables. Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -793,10 +793,6 @@ struct amdgpu_device {
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struct amdgpu_i2c_chan *i2c_bus[AMDGPU_MAX_I2C_BUS];
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struct amdgpu_debugfs debugfs[AMDGPU_DEBUGFS_MAX_COMPONENTS];
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unsigned debugfs_count;
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#if defined(CONFIG_DEBUG_FS)
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struct dentry *debugfs_preempt;
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struct dentry *debugfs_regs[AMDGPU_DEBUGFS_MAX_COMPONENTS];
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#endif
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struct amdgpu_atif *atif;
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struct amdgpu_atcs atcs;
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struct mutex srbm_mutex;
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@ -1228,7 +1228,6 @@ int amdgpu_debugfs_regs_init(struct amdgpu_device *adev)
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adev, debugfs_regs[i]);
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if (!i && !IS_ERR_OR_NULL(ent))
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i_size_write(ent->d_inode, adev->rmmio_size);
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adev->debugfs_regs[i] = ent;
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}
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return 0;
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@ -1594,22 +1593,21 @@ DEFINE_SIMPLE_ATTRIBUTE(fops_sclk_set, NULL,
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int amdgpu_debugfs_init(struct amdgpu_device *adev)
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{
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struct dentry *ent;
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int r, i;
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adev->debugfs_preempt =
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debugfs_create_file("amdgpu_preempt_ib", 0600,
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adev_to_drm(adev)->primary->debugfs_root, adev,
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&fops_ib_preempt);
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if (!(adev->debugfs_preempt)) {
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ent = debugfs_create_file("amdgpu_preempt_ib", 0600,
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adev_to_drm(adev)->primary->debugfs_root, adev,
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&fops_ib_preempt);
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if (!ent) {
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DRM_ERROR("unable to create amdgpu_preempt_ib debugsfs file\n");
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return -EIO;
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}
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adev->smu.debugfs_sclk =
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debugfs_create_file("amdgpu_force_sclk", 0200,
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adev_to_drm(adev)->primary->debugfs_root, adev,
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&fops_sclk_set);
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if (!(adev->smu.debugfs_sclk)) {
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ent = debugfs_create_file("amdgpu_force_sclk", 0200,
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adev_to_drm(adev)->primary->debugfs_root, adev,
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&fops_sclk_set);
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if (!ent) {
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DRM_ERROR("unable to create amdgpu_set_sclk debugsfs file\n");
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return -EIO;
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}
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@ -1137,16 +1137,17 @@ static int amdgpu_ras_sysfs_remove_all(struct amdgpu_device *adev)
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*
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*/
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/* debugfs begin */
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static void amdgpu_ras_debugfs_create_ctrl_node(struct amdgpu_device *adev)
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struct dentry *amdgpu_ras_debugfs_create_ctrl_node(struct amdgpu_device *adev)
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{
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struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
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struct dentry *dir;
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struct drm_minor *minor = adev_to_drm(adev)->primary;
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con->dir = debugfs_create_dir(RAS_FS_NAME, minor->debugfs_root);
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debugfs_create_file("ras_ctrl", S_IWUGO | S_IRUGO, con->dir,
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adev, &amdgpu_ras_debugfs_ctrl_ops);
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debugfs_create_file("ras_eeprom_reset", S_IWUGO | S_IRUGO, con->dir,
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adev, &amdgpu_ras_debugfs_eeprom_ops);
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dir = debugfs_create_dir(RAS_FS_NAME, minor->debugfs_root);
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debugfs_create_file("ras_ctrl", S_IWUGO | S_IRUGO, dir, adev,
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&amdgpu_ras_debugfs_ctrl_ops);
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debugfs_create_file("ras_eeprom_reset", S_IWUGO | S_IRUGO, dir, adev,
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&amdgpu_ras_debugfs_eeprom_ops);
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/*
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* After one uncorrectable error happens, usually GPU recovery will
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@ -1156,24 +1157,24 @@ static void amdgpu_ras_debugfs_create_ctrl_node(struct amdgpu_device *adev)
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* ERREVENT_ATHUB_INTERRUPT generated. Normal GPU recovery routine
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* will never be called.
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*/
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debugfs_create_bool("auto_reboot", S_IWUGO | S_IRUGO, con->dir,
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&con->reboot);
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debugfs_create_bool("auto_reboot", S_IWUGO | S_IRUGO, dir, &con->reboot);
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/*
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* User could set this not to clean up hardware's error count register
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* of RAS IPs during ras recovery.
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*/
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debugfs_create_bool("disable_ras_err_cnt_harvest", 0644,
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con->dir, &con->disable_ras_err_cnt_harvest);
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debugfs_create_bool("disable_ras_err_cnt_harvest", 0644, dir,
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&con->disable_ras_err_cnt_harvest);
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return dir;
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}
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static void amdgpu_ras_debugfs_create(struct amdgpu_device *adev,
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struct ras_fs_if *head)
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struct ras_fs_if *head,
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struct dentry *dir)
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{
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struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
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struct ras_manager *obj = amdgpu_ras_find_obj(adev, &head->head);
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if (!obj || obj->ent)
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if (!obj || !dir)
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return;
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get_obj(obj);
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@ -1182,14 +1183,14 @@ static void amdgpu_ras_debugfs_create(struct amdgpu_device *adev,
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head->debugfs_name,
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sizeof(obj->fs_data.debugfs_name));
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obj->ent = debugfs_create_file(obj->fs_data.debugfs_name,
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S_IWUGO | S_IRUGO, con->dir, obj,
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&amdgpu_ras_debugfs_ops);
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debugfs_create_file(obj->fs_data.debugfs_name, S_IWUGO | S_IRUGO, dir,
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obj, &amdgpu_ras_debugfs_ops);
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}
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void amdgpu_ras_debugfs_create_all(struct amdgpu_device *adev)
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{
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struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
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struct dentry *dir;
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struct ras_manager *obj;
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struct ras_fs_if fs_info;
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@ -1200,7 +1201,7 @@ void amdgpu_ras_debugfs_create_all(struct amdgpu_device *adev)
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if (!IS_ENABLED(CONFIG_DEBUG_FS) || !con)
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return;
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amdgpu_ras_debugfs_create_ctrl_node(adev);
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dir = amdgpu_ras_debugfs_create_ctrl_node(adev);
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list_for_each_entry(obj, &con->head, node) {
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if (amdgpu_ras_is_supported(adev, obj->head.block) &&
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@ -1208,34 +1209,11 @@ void amdgpu_ras_debugfs_create_all(struct amdgpu_device *adev)
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sprintf(fs_info.debugfs_name, "%s_err_inject",
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ras_block_str(obj->head.block));
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fs_info.head = obj->head;
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amdgpu_ras_debugfs_create(adev, &fs_info);
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amdgpu_ras_debugfs_create(adev, &fs_info, dir);
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}
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}
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}
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static void amdgpu_ras_debugfs_remove(struct amdgpu_device *adev,
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struct ras_common_if *head)
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{
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struct ras_manager *obj = amdgpu_ras_find_obj(adev, head);
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if (!obj || !obj->ent)
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return;
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obj->ent = NULL;
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put_obj(obj);
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}
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static void amdgpu_ras_debugfs_remove_all(struct amdgpu_device *adev)
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{
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struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
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struct ras_manager *obj, *tmp;
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list_for_each_entry_safe(obj, tmp, &con->head, node) {
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amdgpu_ras_debugfs_remove(adev, &obj->head);
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}
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con->dir = NULL;
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}
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/* debugfs end */
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/* ras fs */
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@ -1282,8 +1260,17 @@ static int amdgpu_ras_fs_init(struct amdgpu_device *adev)
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static int amdgpu_ras_fs_fini(struct amdgpu_device *adev)
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{
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if (IS_ENABLED(CONFIG_DEBUG_FS))
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amdgpu_ras_debugfs_remove_all(adev);
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struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
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struct ras_manager *con_obj, *ip_obj, *tmp;
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if (IS_ENABLED(CONFIG_DEBUG_FS)) {
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list_for_each_entry_safe(con_obj, tmp, &con->head, node) {
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ip_obj = amdgpu_ras_find_obj(adev, &con_obj->head);
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if (ip_obj)
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put_obj(ip_obj);
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}
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}
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amdgpu_ras_sysfs_remove_all(adev);
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return 0;
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}
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@ -318,8 +318,6 @@ struct amdgpu_ras {
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uint32_t supported;
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uint32_t features;
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struct list_head head;
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/* debugfs */
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struct dentry *dir;
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/* sysfs */
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struct device_attribute features_attr;
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struct bin_attribute badpages_attr;
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@ -395,8 +393,6 @@ struct ras_manager {
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struct list_head node;
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/* the device */
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struct amdgpu_device *adev;
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/* debugfs */
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struct dentry *ent;
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/* sysfs */
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struct device_attribute sysfs_attr;
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int attr_inuse;
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@ -1696,7 +1696,7 @@ static void amdgpu_ttm_training_data_block_init(struct amdgpu_device *adev)
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(adev->gmc.mc_vram_size - GDDR6_MEM_TRAINING_OFFSET);
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ctx->train_data_size =
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GDDR6_MEM_TRAINING_DATA_SIZE_IN_BYTES;
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DRM_DEBUG("train_data_size:%llx,p2c_train_data_offset:%llx,c2p_train_data_offset:%llx.\n",
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ctx->train_data_size,
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ctx->p2c_train_data_offset,
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@ -2474,18 +2474,6 @@ static const struct file_operations amdgpu_ttm_iomem_fops = {
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.llseek = default_llseek
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};
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static const struct {
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char *name;
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const struct file_operations *fops;
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int domain;
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} ttm_debugfs_entries[] = {
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{ "amdgpu_vram", &amdgpu_ttm_vram_fops, TTM_PL_VRAM },
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#ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
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{ "amdgpu_gtt", &amdgpu_ttm_gtt_fops, TTM_PL_TT },
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#endif
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{ "amdgpu_iomem", &amdgpu_ttm_iomem_fops, TTM_PL_SYSTEM },
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};
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#endif
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int amdgpu_ttm_debugfs_init(struct amdgpu_device *adev)
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@ -2494,23 +2482,18 @@ int amdgpu_ttm_debugfs_init(struct amdgpu_device *adev)
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unsigned count;
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struct drm_minor *minor = adev_to_drm(adev)->primary;
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struct dentry *ent, *root = minor->debugfs_root;
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umode_t mode = S_IFREG | S_IRUGO;
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struct dentry *root = minor->debugfs_root;
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for (count = 0; count < ARRAY_SIZE(ttm_debugfs_entries); count++) {
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ent = debugfs_create_file(
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ttm_debugfs_entries[count].name,
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S_IFREG | S_IRUGO, root,
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adev,
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ttm_debugfs_entries[count].fops);
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if (IS_ERR(ent))
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return PTR_ERR(ent);
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if (ttm_debugfs_entries[count].domain == TTM_PL_VRAM)
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i_size_write(ent->d_inode, adev->gmc.mc_vram_size);
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else if (ttm_debugfs_entries[count].domain == TTM_PL_TT)
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i_size_write(ent->d_inode, adev->gmc.gart_size);
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adev->mman.debugfs_entries[count] = ent;
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}
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debugfs_create_file_size("amdgpu_vram", mode, root, adev,
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&amdgpu_ttm_vram_fops, adev->gmc.mc_vram_size);
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#ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
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debugfs_create_file_size("amdgpu_gtt", mode, root, adev,
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&amdgpu_ttm_gtt_fops, adev->gmc.gart_size);
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#endif
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debugfs_create_file("amdgpu_iomem", mode, root, adev,
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&amdgpu_ttm_iomem_fops);
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count = ARRAY_SIZE(amdgpu_ttm_debugfs_list);
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return amdgpu_debugfs_add_files(adev, amdgpu_ttm_debugfs_list, count);
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#else
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@ -64,10 +64,6 @@ struct amdgpu_mman {
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bool initialized;
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void __iomem *aper_base_kaddr;
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#if defined(CONFIG_DEBUG_FS)
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struct dentry *debugfs_entries[8];
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#endif
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/* buffer handling */
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const struct amdgpu_buffer_funcs *buffer_funcs;
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struct amdgpu_ring *buffer_funcs_ring;
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@ -439,9 +439,6 @@ struct smu_context
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struct smu_baco_context smu_baco;
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struct smu_temperature_range thermal_range;
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void *od_settings;
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#if defined(CONFIG_DEBUG_FS)
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struct dentry *debugfs_sclk;
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#endif
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struct smu_umd_pstate_table pstate_table;
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uint32_t pstate_sclk;
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