MIPS: SMTC: Support for Multi-threaded FPUs
Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3603/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle
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2244f12865
commit
889a4c7b33
@ -28,6 +28,9 @@
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#define read_c0_vpeconf0() __read_32bit_c0_register($1, 2)
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#define write_c0_vpeconf0(val) __write_32bit_c0_register($1, 2, val)
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#define read_c0_vpeconf1() __read_32bit_c0_register($1, 3)
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#define write_c0_vpeconf1(val) __write_32bit_c0_register($1, 3, val)
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#define read_c0_tcstatus() __read_32bit_c0_register($2, 1)
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#define write_c0_tcstatus(val) __write_32bit_c0_register($2, 1, val)
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@ -124,6 +127,14 @@
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#define VPECONF0_XTC_SHIFT 21
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#define VPECONF0_XTC (_ULCAST_(0xff) << VPECONF0_XTC_SHIFT)
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/* VPEConf1 fields (per VPE) */
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#define VPECONF1_NCP1_SHIFT 0
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#define VPECONF1_NCP1 (_ULCAST_(0xff) << VPECONF1_NCP1_SHIFT)
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#define VPECONF1_NCP2_SHIFT 10
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#define VPECONF1_NCP2 (_ULCAST_(0xff) << VPECONF1_NCP2_SHIFT)
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#define VPECONF1_NCX_SHIFT 20
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#define VPECONF1_NCX (_ULCAST_(0xff) << VPECONF1_NCX_SHIFT)
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/* TCStatus fields (per TC) */
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#define TCSTATUS_TASID (_ULCAST_(0xff))
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#define TCSTATUS_IXMT_SHIFT 10
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@ -350,6 +361,8 @@ do { \
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#define write_vpe_c0_vpecontrol(val) mttc0(1, 1, val)
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#define read_vpe_c0_vpeconf0() mftc0(1, 2)
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#define write_vpe_c0_vpeconf0(val) mttc0(1, 2, val)
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#define read_vpe_c0_vpeconf1() mftc0(1, 3)
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#define write_vpe_c0_vpeconf1(val) mttc0(1, 3, val)
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#define read_vpe_c0_count() mftc0(9, 0)
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#define write_vpe_c0_count(val) mttc0(9, 0, val)
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#define read_vpe_c0_status() mftc0(12, 0)
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