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iio: adc: ti-ads8344: Fix alignment for DMA safety

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____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 8dd2d7c0fed7 ("iio: adc: Add driver for the TI ADS8344 A/DC chips")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-38-jic23@kernel.org
This commit is contained in:
Jonathan Cameron 2022-05-08 18:56:17 +01:00
parent dd54ba8b24
commit 8966b11e5a
1 changed files with 1 additions and 1 deletions
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drivers/iio/adc/ti-ads8344.c
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@ -28,7 +28,7 @@ struct ads8344 {
*/
struct mutex lock;
u8 tx_buf ____cacheline_aligned;
u8 tx_buf __aligned(IIO_DMA_MINALIGN);
u8 rx_buf[3];
};