drm/amd/display: Remove SubVp support if src/dst rect does not equal stream timing
Current implementation of SubVP does not support cases where stream timing matched neither the destination rect nor the source rect. Will need to further debug to see how we can support these cases. Tested-by: Daniel Wheeler <Daniel.Wheeler@amd.com> Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Saaem Rizvi <SyedSaaem.Rizvi@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -240,6 +240,14 @@ bool dcn32_is_center_timing(struct pipe_ctx *pipe)
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is_center_timing = true;
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}
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}
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if (pipe->plane_state) {
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if (pipe->stream->timing.v_addressable != pipe->plane_state->dst_rect.height &&
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pipe->stream->timing.v_addressable != pipe->plane_state->src_rect.height) {
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is_center_timing = true;
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}
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}
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return is_center_timing;
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}
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