drm/amd/display: Remove SubVp support if src/dst rect does not equal stream timing

Current implementation of SubVP does not support cases where stream
timing matched neither the destination rect nor the source rect.

Will need to further debug to see how we can support these cases.

Tested-by: Daniel Wheeler <Daniel.Wheeler@amd.com>
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Saaem Rizvi <SyedSaaem.Rizvi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Saaem Rizvi 2022-12-15 16:38:08 -05:00 committed by Alex Deucher
parent 27fc64764e
commit 899dd5b835

View File

@ -240,6 +240,14 @@ bool dcn32_is_center_timing(struct pipe_ctx *pipe)
is_center_timing = true;
}
}
if (pipe->plane_state) {
if (pipe->stream->timing.v_addressable != pipe->plane_state->dst_rect.height &&
pipe->stream->timing.v_addressable != pipe->plane_state->src_rect.height) {
is_center_timing = true;
}
}
return is_center_timing;
}