arch/idle: Change arch_cpu_idle() behavior: always exit with IRQs disabled
Current arch_cpu_idle() is called with IRQs disabled, but will return with IRQs enabled. However, the very first thing the generic code does after calling arch_cpu_idle() is raw_local_irq_disable(). This means that architectures that can idle with IRQs disabled end up doing a pointless 'enable-disable' dance. Therefore, push this IRQ disabling into the idle function, meaning that those architectures can avoid the pointless IRQ state flipping. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Acked-by: Mark Rutland <mark.rutland@arm.com> [arm64] Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Guo Ren <guoren@kernel.org> Acked-by: Frederic Weisbecker <frederic@kernel.org> Link: https://lore.kernel.org/r/20230112195540.618076436@infradead.org
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@ -57,7 +57,6 @@ EXPORT_SYMBOL(pm_power_off);
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void arch_cpu_idle(void)
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{
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wtint(0);
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raw_local_irq_enable();
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}
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void arch_cpu_idle_dead(void)
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@ -114,6 +114,8 @@ void arch_cpu_idle(void)
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"sleep %0 \n"
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:
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:"I"(arg)); /* can't be "r" has to be embedded const */
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raw_local_irq_disable();
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}
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#else /* ARC700 */
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@ -122,6 +124,7 @@ void arch_cpu_idle(void)
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{
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/* sleep, but enable both set E1/E2 (levels of interrupts) before committing */
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__asm__ __volatile__("sleep 0x3 \n");
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raw_local_irq_disable();
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}
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#endif
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@ -78,7 +78,6 @@ void arch_cpu_idle(void)
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arm_pm_idle();
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else
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cpu_do_idle();
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raw_local_irq_enable();
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}
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void arch_cpu_idle_prepare(void)
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@ -42,8 +42,9 @@ static void gemini_idle(void)
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*/
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/* FIXME: Enabling interrupts here is racy! */
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local_irq_enable();
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raw_local_irq_enable();
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cpu_do_idle();
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raw_local_irq_disable();
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}
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static void __init gemini_init_machine(void)
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@ -42,5 +42,4 @@ void noinstr arch_cpu_idle(void)
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* tricks
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*/
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cpu_do_idle();
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raw_local_irq_enable();
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}
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@ -100,6 +100,5 @@ void arch_cpu_idle(void)
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#ifdef CONFIG_CPU_PM_STOP
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asm volatile("stop\n");
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#endif
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raw_local_irq_enable();
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}
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#endif
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@ -309,7 +309,7 @@ void arch_cpu_idle_dead(void)
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while (!secondary_stack)
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arch_cpu_idle();
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local_irq_disable();
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raw_local_irq_disable();
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asm volatile(
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"mov sp, %0\n"
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@ -44,7 +44,6 @@ void arch_cpu_idle(void)
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{
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__vmwait();
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/* interrupts wake us up, but irqs are still disabled */
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raw_local_irq_enable();
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}
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/*
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@ -242,6 +242,7 @@ void arch_cpu_idle(void)
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(*mark_idle)(1);
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raw_safe_halt();
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raw_local_irq_disable();
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if (mark_idle)
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(*mark_idle)(0);
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@ -13,4 +13,5 @@ void __cpuidle arch_cpu_idle(void)
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{
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raw_local_irq_enable();
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__arch_cpu_idle(); /* idle instruction needs irq enabled */
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raw_local_irq_disable();
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}
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@ -140,5 +140,4 @@ int elf_core_copy_task_fpregs(struct task_struct *t, elf_fpregset_t *fpu)
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void arch_cpu_idle(void)
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{
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raw_local_irq_enable();
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}
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@ -33,13 +33,13 @@ static void __cpuidle r3081_wait(void)
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{
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unsigned long cfg = read_c0_conf();
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write_c0_conf(cfg | R30XX_CONF_HALT);
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raw_local_irq_enable();
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}
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void __cpuidle r4k_wait(void)
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{
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raw_local_irq_enable();
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__r4k_wait();
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raw_local_irq_disable();
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}
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/*
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@ -57,7 +57,6 @@ void __cpuidle r4k_wait_irqoff(void)
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" .set arch=r4000 \n"
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" wait \n"
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" .set pop \n");
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raw_local_irq_enable();
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}
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/*
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@ -77,7 +76,6 @@ static void __cpuidle rm7k_wait_irqoff(void)
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" wait \n"
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" mtc0 $1, $12 # stalls until W stage \n"
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" .set pop \n");
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raw_local_irq_enable();
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}
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/*
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@ -103,6 +101,8 @@ static void __cpuidle au1k_wait(void)
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" nop \n"
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" .set pop \n"
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: : "r" (au1k_wait), "r" (c0status));
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raw_local_irq_disable();
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}
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static int __initdata nowait;
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@ -245,8 +245,6 @@ void arch_cpu_idle(void)
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{
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if (cpu_wait)
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cpu_wait();
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else
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raw_local_irq_enable();
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}
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#ifdef CONFIG_CPU_IDLE
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@ -33,7 +33,6 @@ EXPORT_SYMBOL(pm_power_off);
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void arch_cpu_idle(void)
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{
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raw_local_irq_enable();
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}
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/*
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@ -102,6 +102,7 @@ void arch_cpu_idle(void)
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raw_local_irq_enable();
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if (mfspr(SPR_UPR) & SPR_UPR_PMP)
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mtspr(SPR_PMR, mfspr(SPR_PMR) | SPR_PMR_DME);
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raw_local_irq_disable();
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}
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void (*pm_power_off)(void) = NULL;
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@ -183,8 +183,6 @@ void arch_cpu_idle_dead(void)
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void __cpuidle arch_cpu_idle(void)
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{
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raw_local_irq_enable();
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/* nop on real hardware, qemu will idle sleep. */
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asm volatile("or %%r10,%%r10,%%r10\n":::);
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}
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@ -51,10 +51,9 @@ void arch_cpu_idle(void)
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* Some power_save functions return with
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* interrupts enabled, some don't.
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*/
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if (irqs_disabled())
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raw_local_irq_enable();
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if (!irqs_disabled())
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raw_local_irq_disable();
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} else {
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raw_local_irq_enable();
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/*
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* Go into low thread priority and possibly
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* low power mode.
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@ -39,7 +39,6 @@ extern asmlinkage void ret_from_kernel_thread(void);
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void arch_cpu_idle(void)
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{
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cpu_do_idle();
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raw_local_irq_enable();
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}
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void __show_regs(struct pt_regs *regs)
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@ -66,7 +66,6 @@ void arch_cpu_idle(void)
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idle->idle_count++;
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account_idle_time(cputime_to_nsecs(idle_time));
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raw_write_seqcount_end(&idle->seqcount);
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raw_local_irq_enable();
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}
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static ssize_t show_idle_count(struct device *dev,
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@ -25,6 +25,7 @@ void default_idle(void)
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raw_local_irq_enable();
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/* Isn't this racy ? */
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cpu_sleep();
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raw_local_irq_disable();
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clear_bl_bit();
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}
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@ -57,6 +57,8 @@ static void pmc_leon_idle_fixup(void)
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"lda [%0] %1, %%g0\n"
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:
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: "r"(address), "i"(ASI_LEON_BYPASS));
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raw_local_irq_disable();
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}
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/*
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@ -70,6 +72,8 @@ static void pmc_leon_idle(void)
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/* For systems without power-down, this will be no-op */
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__asm__ __volatile__ ("wr %g0, %asr19\n\t");
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raw_local_irq_disable();
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}
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/* Install LEON Power Down function */
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@ -71,7 +71,6 @@ void arch_cpu_idle(void)
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{
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if (sparc_idle)
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(*sparc_idle)();
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raw_local_irq_enable();
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}
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/* XXX cli/sti -> local_irq_xxx here, check this works once SMP is fixed. */
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@ -59,7 +59,6 @@ void arch_cpu_idle(void)
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{
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if (tlb_type != hypervisor) {
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touch_nmi_watchdog();
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raw_local_irq_enable();
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} else {
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unsigned long pstate;
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@ -90,6 +89,8 @@ void arch_cpu_idle(void)
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"wrpr %0, %%g0, %%pstate"
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: "=&r" (pstate)
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: "i" (PSTATE_IE));
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raw_local_irq_disable();
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}
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}
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@ -218,7 +218,6 @@ void arch_cpu_idle(void)
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{
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cpu_tasks[current_thread_info()->cpu].pid = os_getpid();
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um_idle_sleep();
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raw_local_irq_enable();
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}
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int __cant_sleep(void) {
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@ -274,6 +274,9 @@ void __cpuidle tdx_safe_halt(void)
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*/
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if (__halt(irq_disabled, do_sti))
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WARN_ONCE(1, "HLT instruction emulation failed\n");
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/* XXX I can't make sense of what @do_sti actually does */
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raw_local_irq_disable();
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}
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static int read_msr(struct pt_regs *regs, struct ve_info *ve)
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@ -701,6 +701,7 @@ EXPORT_SYMBOL(boot_option_idle_override);
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void __cpuidle default_idle(void)
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{
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raw_safe_halt();
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raw_local_irq_disable();
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}
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#if defined(CONFIG_APM_MODULE) || defined(CONFIG_HALTPOLL_CPUIDLE_MODULE)
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EXPORT_SYMBOL(default_idle);
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@ -806,13 +807,7 @@ static void amd_e400_idle(void)
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default_idle();
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/*
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* The switch back from broadcast mode needs to be called with
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* interrupts disabled.
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*/
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raw_local_irq_disable();
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tick_broadcast_exit();
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raw_local_irq_enable();
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}
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/*
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@ -870,12 +865,10 @@ static __cpuidle void mwait_idle(void)
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}
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__monitor((void *)¤t_thread_info()->flags, 0, 0);
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if (!need_resched())
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if (!need_resched()) {
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__sti_mwait(0, 0);
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else
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raw_local_irq_enable();
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} else {
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raw_local_irq_enable();
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raw_local_irq_disable();
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}
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}
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__current_clr_polling();
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}
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@ -183,6 +183,7 @@ void coprocessor_flush_release_all(struct thread_info *ti)
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void arch_cpu_idle(void)
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{
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platform_idle();
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raw_local_irq_disable();
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}
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/*
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@ -79,7 +79,6 @@ void __weak arch_cpu_idle_dead(void) { }
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void __weak arch_cpu_idle(void)
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{
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cpu_idle_force_poll = 1;
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raw_local_irq_enable();
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}
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/**
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@ -96,7 +95,6 @@ void __cpuidle default_idle_call(void)
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ct_cpuidle_enter();
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arch_cpu_idle();
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raw_local_irq_disable();
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ct_cpuidle_exit();
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start_critical_timings();
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