Merge branch 'v3.5-rc7-fixes' into v3.5-rc7-dt-v3
Merge in branch already pulled. Fulfils dependancies needed by this patchset.
This commit is contained in:
commit
89fb2d77d5
@ -1,7 +1,7 @@
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NAND support for Marvell Orion SoC platforms
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Required properties:
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- compatible : "mrvl,orion-nand".
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- compatible : "marvell,orion-nand".
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- reg : Base physical address of the NAND and length of memory mapped
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region
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@ -24,7 +24,7 @@ nand@f4000000 {
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ale = <1>;
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bank-width = <1>;
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chip-delay = <25>;
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compatible = "mrvl,orion-nand";
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compatible = "marvell,orion-nand";
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reg = <0xf4000000 0x400>;
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partition@0 {
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@ -4,7 +4,7 @@
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/ {
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model = "D-Link DNS-320 NAS (Rev A1)";
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compatible = "dlink,dns-320-a1", "dlink,dns-320", "dlink,dns-kirkwood", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
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compatible = "dlink,dns-320-a1", "dlink,dns-320", "dlink,dns-kirkwood", "marvell,kirkwood-88f6281", "marvell,kirkwood";
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memory {
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device_type = "memory";
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@ -4,7 +4,7 @@
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/ {
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model = "D-Link DNS-325 NAS (Rev A1)";
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compatible = "dlink,dns-325-a1", "dlink,dns-325", "dlink,dns-kirkwood", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
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compatible = "dlink,dns-325-a1", "dlink,dns-325", "dlink,dns-kirkwood", "marvell,kirkwood-88f6281", "marvell,kirkwood";
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memory {
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device_type = "memory";
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@ -4,7 +4,7 @@
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/ {
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model = "Globalscale Technologies Dreamplug";
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compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
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compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
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memory {
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device_type = "memory";
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@ -4,7 +4,7 @@
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/ {
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model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)";
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compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
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compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood";
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memory {
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device_type = "memory";
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@ -4,7 +4,7 @@
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/ {
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model = "Iomega Iconnect";
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compatible = "iom,iconnect-1.1", "iom,iconnect", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
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compatible = "iom,iconnect-1.1", "iom,iconnect", "marvell,kirkwood-88f6281", "marvell,kirkwood";
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memory {
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device_type = "memory";
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@ -1,7 +1,7 @@
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/include/ "skeleton.dtsi"
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/ {
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compatible = "mrvl,kirkwood";
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compatible = "marvell,kirkwood";
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ocp@f1000000 {
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compatible = "simple-bus";
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@ -28,7 +28,7 @@
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};
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rtc@10300 {
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compatible = "mrvl,kirkwood-rtc", "mrvl,orion-rtc";
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compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
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reg = <0x10300 0x20>;
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interrupts = <53>;
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};
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@ -39,7 +39,7 @@
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cle = <0>;
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ale = <1>;
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bank-width = <1>;
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compatible = "mrvl,orion-nand";
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compatible = "marvell,orion-nand";
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reg = <0x3000000 0x400>;
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chip-delay = <25>;
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/* set partition map and/or chip-delay in board dts */
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@ -101,8 +101,8 @@ void __init dove_ehci1_init(void)
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****************************************************************************/
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void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
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{
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orion_ge00_init(eth_data,
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DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM, 0);
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orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE,
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IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR);
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}
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/*****************************************************************************
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@ -67,6 +67,14 @@ void __init kirkwood_map_io(void)
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* CLK tree
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****************************************************************************/
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static void enable_sata0(void)
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{
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/* Enable PLL and IVREF */
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writel(readl(SATA0_PHY_MODE_2) | 0xf, SATA0_PHY_MODE_2);
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/* Enable PHY */
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writel(readl(SATA0_IF_CTRL) & ~0x200, SATA0_IF_CTRL);
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}
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static void disable_sata0(void)
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{
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/* Disable PLL and IVREF */
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@ -75,6 +83,14 @@ static void disable_sata0(void)
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writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
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}
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static void enable_sata1(void)
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{
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/* Enable PLL and IVREF */
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writel(readl(SATA1_PHY_MODE_2) | 0xf, SATA1_PHY_MODE_2);
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/* Enable PHY */
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writel(readl(SATA1_IF_CTRL) & ~0x200, SATA1_IF_CTRL);
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}
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static void disable_sata1(void)
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{
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/* Disable PLL and IVREF */
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@ -107,23 +123,38 @@ static void disable_pcie1(void)
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}
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}
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/* An extended version of the gated clk. This calls fn() before
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* disabling the clock. We use this to turn off PHYs etc. */
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/* An extended version of the gated clk. This calls fn_en()/fn_dis
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* before enabling/disabling the clock. We use this to turn on/off
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* PHYs etc. */
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struct clk_gate_fn {
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struct clk_gate gate;
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void (*fn)(void);
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void (*fn_en)(void);
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void (*fn_dis)(void);
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};
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#define to_clk_gate_fn(_gate) container_of(_gate, struct clk_gate_fn, gate)
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#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
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static int clk_gate_fn_enable(struct clk_hw *hw)
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{
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struct clk_gate *gate = to_clk_gate(hw);
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struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate);
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int ret;
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ret = clk_gate_ops.enable(hw);
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if (!ret && gate_fn->fn_en)
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gate_fn->fn_en();
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return ret;
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}
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static void clk_gate_fn_disable(struct clk_hw *hw)
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{
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struct clk_gate *gate = to_clk_gate(hw);
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struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate);
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if (gate_fn->fn)
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gate_fn->fn();
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if (gate_fn->fn_dis)
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gate_fn->fn_dis();
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clk_gate_ops.disable(hw);
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}
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@ -135,7 +166,7 @@ static struct clk __init *clk_register_gate_fn(struct device *dev,
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const char *parent_name, unsigned long flags,
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void __iomem *reg, u8 bit_idx,
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u8 clk_gate_flags, spinlock_t *lock,
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void (*fn)(void))
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void (*fn_en)(void), void (*fn_dis)(void))
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{
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struct clk_gate_fn *gate_fn;
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struct clk *clk;
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@ -159,11 +190,14 @@ static struct clk __init *clk_register_gate_fn(struct device *dev,
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gate_fn->gate.flags = clk_gate_flags;
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gate_fn->gate.lock = lock;
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gate_fn->gate.hw.init = &init;
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gate_fn->fn = fn;
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gate_fn->fn_en = fn_en;
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gate_fn->fn_dis = fn_dis;
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/* ops is the gate ops, but with our disable function */
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if (clk_gate_fn_ops.disable != clk_gate_fn_disable) {
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/* ops is the gate ops, but with our enable/disable functions */
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if (clk_gate_fn_ops.enable != clk_gate_fn_enable ||
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clk_gate_fn_ops.disable != clk_gate_fn_disable) {
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clk_gate_fn_ops = clk_gate_ops;
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clk_gate_fn_ops.enable = clk_gate_fn_enable;
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clk_gate_fn_ops.disable = clk_gate_fn_disable;
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}
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@ -187,11 +221,12 @@ static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx)
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static struct clk __init *kirkwood_register_gate_fn(const char *name,
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u8 bit_idx,
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void (*fn)(void))
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void (*fn_en)(void),
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void (*fn_dis)(void))
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{
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return clk_register_gate_fn(NULL, name, "tclk", 0,
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(void __iomem *)CLOCK_GATING_CTRL,
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bit_idx, 0, &gating_lock, fn);
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bit_idx, 0, &gating_lock, fn_en, fn_dis);
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}
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static struct clk *ge0, *ge1;
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@ -208,18 +243,18 @@ void __init kirkwood_clk_init(void)
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ge0 = kirkwood_register_gate("ge0", CGC_BIT_GE0);
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ge1 = kirkwood_register_gate("ge1", CGC_BIT_GE1);
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sata0 = kirkwood_register_gate_fn("sata0", CGC_BIT_SATA0,
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disable_sata0);
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enable_sata0, disable_sata0);
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sata1 = kirkwood_register_gate_fn("sata1", CGC_BIT_SATA1,
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disable_sata1);
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enable_sata1, disable_sata1);
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usb0 = kirkwood_register_gate("usb0", CGC_BIT_USB0);
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sdio = kirkwood_register_gate("sdio", CGC_BIT_SDIO);
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crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO);
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xor0 = kirkwood_register_gate("xor0", CGC_BIT_XOR0);
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xor1 = kirkwood_register_gate("xor1", CGC_BIT_XOR1);
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pex0 = kirkwood_register_gate_fn("pex0", CGC_BIT_PEX0,
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disable_pcie0);
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NULL, disable_pcie0);
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pex1 = kirkwood_register_gate_fn("pex1", CGC_BIT_PEX1,
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disable_pcie1);
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NULL, disable_pcie1);
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audio = kirkwood_register_gate("audio", CGC_BIT_AUDIO);
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kirkwood_register_gate("tdm", CGC_BIT_TDM);
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kirkwood_register_gate("tsu", CGC_BIT_TSU);
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@ -241,6 +276,11 @@ void __init kirkwood_clk_init(void)
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orion_clkdev_add("0", "pcie", pex0);
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orion_clkdev_add("1", "pcie", pex1);
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orion_clkdev_add(NULL, "kirkwood-i2s", audio);
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/* Marvell says runit is used by SPI, UART, NAND, TWSI, ...,
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* so should never be gated.
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*/
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clk_prepare_enable(runit);
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}
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/*****************************************************************************
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@ -1098,6 +1098,10 @@ err_unreg_ecb:
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crypto_unregister_alg(&mv_aes_alg_ecb);
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err_irq:
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free_irq(irq, cp);
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if (!IS_ERR(cp->clk)) {
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clk_disable_unprepare(cp->clk);
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clk_put(cp->clk);
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}
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err_thread:
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kthread_stop(cp->queue_th);
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err_unmap_sram:
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@ -839,6 +839,10 @@ out:
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if (r)
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release_resource(r);
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if (mmc)
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if (!IS_ERR_OR_NULL(host->clk)) {
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clk_disable_unprepare(host->clk);
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clk_put(host->clk);
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}
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mmc_free_host(mmc);
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return ret;
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@ -183,6 +183,10 @@ static int __init orion_nand_probe(struct platform_device *pdev)
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return 0;
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no_dev:
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if (!IS_ERR(clk)) {
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clk_disable_unprepare(clk);
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clk_put(clk);
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}
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platform_set_drvdata(pdev, NULL);
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iounmap(io_base);
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no_res:
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@ -214,7 +218,7 @@ static int __devexit orion_nand_remove(struct platform_device *pdev)
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#ifdef CONFIG_OF
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static struct of_device_id orion_nand_of_match_table[] = {
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{ .compatible = "mrvl,orion-nand", },
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{ .compatible = "marvell,orion-nand", },
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{},
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};
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#endif
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@ -2983,6 +2983,12 @@ static int mv643xx_eth_probe(struct platform_device *pdev)
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return 0;
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out:
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#if defined(CONFIG_HAVE_CLK)
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if (!IS_ERR(mp->clk)) {
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clk_disable_unprepare(mp->clk);
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clk_put(mp->clk);
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}
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#endif
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free_netdev(dev);
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return err;
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@ -297,7 +297,7 @@ static int __exit mv_rtc_remove(struct platform_device *pdev)
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#ifdef CONFIG_OF
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static struct of_device_id rtc_mv_of_match_table[] = {
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{ .compatible = "mrvl,orion-rtc", },
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{ .compatible = "marvell,orion-rtc", },
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{}
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};
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#endif
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@ -298,6 +298,10 @@ static int __devinit ehci_orion_drv_probe(struct platform_device *pdev)
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err4:
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usb_put_hcd(hcd);
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err3:
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if (!IS_ERR(clk)) {
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clk_disable_unprepare(clk);
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clk_put(clk);
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}
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iounmap(regs);
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err2:
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release_mem_region(res->start, resource_size(res));
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@ -458,7 +458,13 @@ static __devinit int kirkwood_i2s_dev_probe(struct platform_device *pdev)
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}
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clk_prepare_enable(priv->clk);
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return snd_soc_register_dai(&pdev->dev, &kirkwood_i2s_dai);
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err = snd_soc_register_dai(&pdev->dev, &kirkwood_i2s_dai);
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if (!err)
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return 0;
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dev_err(&pdev->dev, "snd_soc_register_dai failed\n");
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clk_disable_unprepare(priv->clk);
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clk_put(priv->clk);
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err_ioremap:
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iounmap(priv->io);
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|
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