x86/bugs: Switch to new Intel CPU model defines
New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Acked-by: Josh Poimboeuf <jpoimboe@kernel.org> Link: https://lore.kernel.org/r/20240424181506.41673-1-tony.luck@intel.com
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@ -26,7 +26,7 @@
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#include <asm/msr.h>
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#include <asm/vmx.h>
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#include <asm/paravirt.h>
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#include <asm/intel-family.h>
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#include <asm/cpu_device_id.h>
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#include <asm/e820/api.h>
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#include <asm/hypervisor.h>
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#include <asm/tlbflush.h>
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@ -2390,20 +2390,20 @@ static void override_cache_bits(struct cpuinfo_x86 *c)
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if (c->x86 != 6)
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return;
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switch (c->x86_model) {
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case INTEL_FAM6_NEHALEM:
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case INTEL_FAM6_WESTMERE:
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case INTEL_FAM6_SANDYBRIDGE:
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case INTEL_FAM6_IVYBRIDGE:
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case INTEL_FAM6_HASWELL:
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case INTEL_FAM6_HASWELL_L:
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case INTEL_FAM6_HASWELL_G:
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case INTEL_FAM6_BROADWELL:
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case INTEL_FAM6_BROADWELL_G:
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case INTEL_FAM6_SKYLAKE_L:
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case INTEL_FAM6_SKYLAKE:
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case INTEL_FAM6_KABYLAKE_L:
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case INTEL_FAM6_KABYLAKE:
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switch (c->x86_vfm) {
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case INTEL_NEHALEM:
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case INTEL_WESTMERE:
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case INTEL_SANDYBRIDGE:
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case INTEL_IVYBRIDGE:
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case INTEL_HASWELL:
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case INTEL_HASWELL_L:
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case INTEL_HASWELL_G:
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case INTEL_BROADWELL:
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case INTEL_BROADWELL_G:
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case INTEL_SKYLAKE_L:
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case INTEL_SKYLAKE:
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case INTEL_KABYLAKE_L:
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case INTEL_KABYLAKE:
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if (c->x86_cache_bits < 44)
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c->x86_cache_bits = 44;
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break;
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