dt-bindings: can: rcar_canfd: Convert to json-schema
Convert the Renesas R-Car CAN FD Controller Device Tree binding documentation to json-schema. Document missing properties. The CANFD clock needs to be configured for the maximum frequency on R-Car V3M and V3H, too. Update the example to match reality. Link: https://lore.kernel.org/r/905134c87f72e2d8e37c309e0ce28ecd7d4f3992.1620323639.git.geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Geert Uytterhoeven
Marc Kleine-Budde
parent
75a78026ea
commit
8a5e7d19c8
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Renesas R-Car CAN FD controller Device Tree Bindings
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----------------------------------------------------
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Required properties:
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- compatible: Must contain one or more of the following:
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- "renesas,rcar-gen3-canfd" for R-Car Gen3 and RZ/G2 compatible controllers.
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- "renesas,r8a774a1-canfd" for R8A774A1 (RZ/G2M) compatible controller.
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- "renesas,r8a774b1-canfd" for R8A774B1 (RZ/G2N) compatible controller.
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- "renesas,r8a774c0-canfd" for R8A774C0 (RZ/G2E) compatible controller.
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- "renesas,r8a774e1-canfd" for R8A774E1 (RZ/G2H) compatible controller.
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- "renesas,r8a7795-canfd" for R8A7795 (R-Car H3) compatible controller.
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- "renesas,r8a7796-canfd" for R8A7796 (R-Car M3-W) compatible controller.
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- "renesas,r8a77965-canfd" for R8A77965 (R-Car M3-N) compatible controller.
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- "renesas,r8a77970-canfd" for R8A77970 (R-Car V3M) compatible controller.
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- "renesas,r8a77980-canfd" for R8A77980 (R-Car V3H) compatible controller.
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- "renesas,r8a77990-canfd" for R8A77990 (R-Car E3) compatible controller.
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- "renesas,r8a77995-canfd" for R8A77995 (R-Car D3) compatible controller.
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When compatible with the generic version, nodes must list the
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SoC-specific version corresponding to the platform first, followed by the
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family-specific and/or generic versions.
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- reg: physical base address and size of the R-Car CAN FD register map.
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- interrupts: interrupt specifiers for the Channel & Global interrupts
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- clocks: phandles and clock specifiers for 3 clock inputs.
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- clock-names: 3 clock input name strings: "fck", "canfd", "can_clk".
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- pinctrl-0: pin control group to be used for this controller.
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- pinctrl-names: must be "default".
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Required child nodes:
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The controller supports two channels and each is represented as a child node.
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The name of the child nodes are "channel0" and "channel1" respectively. Each
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child node supports the "status" property only, which is used to
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enable/disable the respective channel.
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Required properties for R8A774A1, R8A774B1, R8A774C0, R8A774E1, R8A7795,
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R8A7796, R8A77965, R8A77990, and R8A77995:
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In the denoted SoCs, canfd clock is a div6 clock and can be used by both CAN
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and CAN FD controller at the same time. It needs to be scaled to maximum
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frequency if any of these controllers use it. This is done using the below
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properties:
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- assigned-clocks: phandle of canfd clock.
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- assigned-clock-rates: maximum frequency of this clock.
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Optional property:
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The controller can operate in either CAN FD only mode (default) or
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Classical CAN only mode. The mode is global to both the channels. In order to
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enable the later, define the following optional property.
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- renesas,no-can-fd: puts the controller in Classical CAN only mode.
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Example
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-------
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SoC common .dtsi file:
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canfd: can@e66c0000 {
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compatible = "renesas,r8a7795-canfd",
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"renesas,rcar-gen3-canfd";
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reg = <0 0xe66c0000 0 0x8000>;
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interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 914>,
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<&cpg CPG_CORE R8A7795_CLK_CANFD>,
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<&can_clk>;
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clock-names = "fck", "canfd", "can_clk";
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assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
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assigned-clock-rates = <40000000>;
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power-domains = <&cpg>;
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status = "disabled";
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channel0 {
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status = "disabled";
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};
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channel1 {
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status = "disabled";
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};
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};
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Board specific .dts file:
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E.g. below enables Channel 1 alone in the board in Classical CAN only mode.
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&canfd {
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pinctrl-0 = <&canfd1_pins>;
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pinctrl-names = "default";
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renesas,no-can-fd;
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status = "okay";
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channel1 {
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status = "okay";
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};
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};
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E.g. below enables Channel 0 alone in the board using External clock
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as fCAN clock.
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&canfd {
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pinctrl-0 = <&canfd0_pins>, <&can_clk_pins>;
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pinctrl-names = "default";
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status = "okay";
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channel0 {
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status = "okay";
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};
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};
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@ -0,0 +1,122 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/can/renesas,rcar-canfd.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas R-Car CAN FD Controller
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maintainers:
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- Fabrizio Castro <fabrizio.castro.jz@renesas.com>
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allOf:
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- $ref: can-controller.yaml#
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- renesas,r8a774a1-canfd # RZ/G2M
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- renesas,r8a774b1-canfd # RZ/G2N
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- renesas,r8a774c0-canfd # RZ/G2E
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- renesas,r8a774e1-canfd # RZ/G2H
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- renesas,r8a7795-canfd # R-Car H3
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- renesas,r8a7796-canfd # R-Car M3-W
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- renesas,r8a77965-canfd # R-Car M3-N
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- renesas,r8a77970-canfd # R-Car V3M
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- renesas,r8a77980-canfd # R-Car V3H
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- renesas,r8a77990-canfd # R-Car E3
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- renesas,r8a77995-canfd # R-Car D3
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- const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2
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reg:
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maxItems: 1
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interrupts:
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items:
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- description: Channel interrupt
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- description: Global interrupt
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clocks:
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maxItems: 3
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clock-names:
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items:
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- const: fck
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- const: canfd
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- const: can_clk
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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renesas,no-can-fd:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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The controller can operate in either CAN FD only mode (default) or
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Classical CAN only mode. The mode is global to both the channels.
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Specify this property to put the controller in Classical CAN only mode.
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assigned-clocks:
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description:
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Reference to the CANFD clock. The CANFD clock is a div6 clock and can be
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used by both CAN (if present) and CAN FD controllers at the same time.
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It needs to be scaled to maximum frequency if any of these controllers
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use it.
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assigned-clock-rates:
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description: Maximum frequency of the CANFD clock.
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patternProperties:
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"^channel[01]$":
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type: object
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description:
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The controller supports two channels and each is represented as a child
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node. Each child node supports the "status" property only, which
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is used to enable/disable the respective channel.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- power-domains
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- resets
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- assigned-clocks
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- assigned-clock-rates
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- channel0
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- channel1
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a7795-sysc.h>
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canfd: can@e66c0000 {
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compatible = "renesas,r8a7795-canfd",
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"renesas,rcar-gen3-canfd";
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reg = <0xe66c0000 0x8000>;
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interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 914>,
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<&cpg CPG_CORE R8A7795_CLK_CANFD>,
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<&can_clk>;
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clock-names = "fck", "canfd", "can_clk";
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assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
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assigned-clock-rates = <40000000>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 914>;
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channel0 {
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};
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channel1 {
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};
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};
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