iommu/vt-d: Add initial support for PASID tables
Add CONFIG_INTEL_IOMMU_SVM, and allocate PASID tables on supported hardware. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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@ -135,6 +135,14 @@ config INTEL_IOMMU
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and include PCI device scope covered by these DMA
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remapping devices.
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config INTEL_IOMMU_SVM
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bool "Support for Shared Virtual Memory with Intel IOMMU"
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depends on INTEL_IOMMU && X86
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help
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Shared Virtual Memory (SVM) provides a facility for devices
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to access DMA resources through process address space by
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means of a Process Address Space ID (PASID).
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config INTEL_IOMMU_DEFAULT_ON
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def_bool y
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prompt "Enable Intel DMA Remapping Devices by default"
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@ -12,6 +12,7 @@ obj-$(CONFIG_ARM_SMMU) += arm-smmu.o
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obj-$(CONFIG_ARM_SMMU_V3) += arm-smmu-v3.o
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obj-$(CONFIG_DMAR_TABLE) += dmar.o
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obj-$(CONFIG_INTEL_IOMMU) += intel-iommu.o
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obj-$(CONFIG_INTEL_IOMMU_SVM) += intel-svm.o
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obj-$(CONFIG_IPMMU_VMSA) += ipmmu-vmsa.o
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obj-$(CONFIG_IRQ_REMAP) += intel_irq_remapping.o irq_remapping.o
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obj-$(CONFIG_OMAP_IOMMU) += omap-iommu.o
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@ -1680,6 +1680,11 @@ static void free_dmar_iommu(struct intel_iommu *iommu)
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/* free context mapping */
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free_context_table(iommu);
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#ifdef CONFIG_INTEL_IOMMU_SVM
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if (pasid_enabled(iommu))
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intel_svm_free_pasid_tables(iommu);
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#endif
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}
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static struct dmar_domain *alloc_domain(int flags)
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@ -3107,6 +3112,10 @@ static int __init init_dmars(void)
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if (!ecap_pass_through(iommu->ecap))
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hw_pass_through = 0;
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#ifdef CONFIG_INTEL_IOMMU_SVM
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if (pasid_enabled(iommu))
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intel_svm_alloc_pasid_tables(iommu);
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#endif
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}
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if (iommu_pass_through)
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@ -4122,6 +4131,11 @@ static int intel_iommu_add(struct dmar_drhd_unit *dmaru)
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if (ret)
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goto out;
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#ifdef CONFIG_INTEL_IOMMU_SVM
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if (pasid_enabled(iommu))
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intel_svm_alloc_pasid_tables(iommu);
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#endif
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if (dmaru->ignored) {
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/*
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* we always have to disable PMRs or DMA may fail on this device
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65
drivers/iommu/intel-svm.c
Normal file
65
drivers/iommu/intel-svm.c
Normal file
@ -0,0 +1,65 @@
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/*
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* Copyright © 2015 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* Authors: David Woodhouse <dwmw2@infradead.org>
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*/
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#include <linux/intel-iommu.h>
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int intel_svm_alloc_pasid_tables(struct intel_iommu *iommu)
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{
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struct page *pages;
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int order;
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order = ecap_pss(iommu->ecap) + 7 - PAGE_SHIFT;
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if (order < 0)
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order = 0;
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pages = alloc_pages(GFP_KERNEL | __GFP_ZERO, order);
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if (!pages) {
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pr_warn("IOMMU: %s: Failed to allocate PASID table\n",
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iommu->name);
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return -ENOMEM;
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}
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iommu->pasid_table = page_address(pages);
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pr_info("%s: Allocated order %d PASID table.\n", iommu->name, order);
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if (ecap_dis(iommu->ecap)) {
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pages = alloc_pages(GFP_KERNEL | __GFP_ZERO, order);
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if (pages)
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iommu->pasid_state_table = page_address(pages);
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else
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pr_warn("IOMMU: %s: Failed to allocate PASID state table\n",
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iommu->name);
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}
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return 0;
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}
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int intel_svm_free_pasid_tables(struct intel_iommu *iommu)
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{
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int order;
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order = ecap_pss(iommu->ecap) + 7 - PAGE_SHIFT;
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if (order < 0)
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order = 0;
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if (iommu->pasid_table) {
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free_pages((unsigned long)iommu->pasid_table, order);
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iommu->pasid_table = NULL;
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}
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if (iommu->pasid_state_table) {
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free_pages((unsigned long)iommu->pasid_state_table, order);
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iommu->pasid_state_table = NULL;
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}
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return 0;
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}
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@ -325,6 +325,9 @@ enum {
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#define VTD_FLAG_TRANS_PRE_ENABLED (1 << 0)
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#define VTD_FLAG_IRQ_REMAP_PRE_ENABLED (1 << 1)
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struct pasid_entry;
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struct pasid_state_entry;
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struct intel_iommu {
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void __iomem *reg; /* Pointer to hardware regs, virtual addr */
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u64 reg_phys; /* physical address of hw register set */
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@ -347,6 +350,15 @@ struct intel_iommu {
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struct root_entry *root_entry; /* virtual address */
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struct iommu_flush flush;
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#endif
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#ifdef CONFIG_INTEL_IOMMU_SVM
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/* These are large and need to be contiguous, so we allocate just
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* one for now. We'll maybe want to rethink that if we truly give
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* devices away to userspace processes (e.g. for DPDK) and don't
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* want to trust that userspace will use *only* the PASID it was
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* told to. But while it's all driver-arbitrated, we're fine. */
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struct pasid_entry *pasid_table;
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struct pasid_state_entry *pasid_state_table;
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#endif
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struct q_inval *qi; /* Queued invalidation info */
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u32 *iommu_state; /* Store iommu states between suspend and resume.*/
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@ -387,6 +399,9 @@ extern int qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu);
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extern int dmar_ir_support(void);
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extern int intel_svm_alloc_pasid_tables(struct intel_iommu *iommu);
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extern int intel_svm_free_pasid_tables(struct intel_iommu *iommu);
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extern const struct attribute_group *intel_iommu_groups[];
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#endif
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