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arm64/sysreg: Convert ID_MMFR5_EL1 to automatic generation

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Convert ID_MMFR5_EL1 to be automatically generated as per DDI0487I.a,
no functional changes.

Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: James Morse <james.morse@arm.com>
Link: https://lore.kernel.org/r/20221130171637.718182-36-james.morse@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
This commit is contained in:
James Morse 2022-11-30 17:16:34 +00:00 committed by Will Deacon
parent f70a810e01
commit 8a950efa1f
2 changed files with 12 additions and 3 deletions
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3
arch/arm64/include/asm/sysreg.h
View File

@ -168,7 +168,6 @@
#define SYS_ID_DFR0_EL1 sys_reg(3, 0, 0, 1, 2)
#define SYS_ID_DFR1_EL1 sys_reg(3, 0, 0, 3, 5)
#define SYS_ID_AFR0_EL1 sys_reg(3, 0, 0, 1, 3)
#define SYS_ID_MMFR5_EL1 sys_reg(3, 0, 0, 3, 6)
#define SYS_ACTLR_EL1 sys_reg(3, 0, 1, 0, 1)
#define SYS_RGSR_EL1 sys_reg(3, 0, 1, 0, 5)
@ -679,8 +678,6 @@
#define ID_DFR1_EL1_MTPMU_SHIFT 0
#define ID_MMFR5_EL1_ETS_SHIFT 0
#define ID_DFR0_EL1_PerfMon_SHIFT 24
#define ID_DFR0_EL1_MProfDbg_SHIFT 20
#define ID_DFR0_EL1_MMapTrc_SHIFT 16

12
arch/arm64/tools/sysreg
View File

@ -717,6 +717,18 @@ Enum 3:0 CSV3
EndEnum
EndSysreg
Sysreg ID_MMFR5_EL1 3 0 0 3 6
Res0 63:8
Enum 7:4 nTLBPA
0b0000 NI
0b0001 IMP
EndEnum
Enum 3:0 ETS
0b0000 NI
0b0001 IMP
EndEnum
EndSysreg
Sysreg ID_AA64PFR0_EL1 3 0 0 4 0
Enum 63:60 CSV3
0b0000 NI