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drm/i915: fix typos in comments

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Spelling mistakes (triple letters) in comments.
Detected with the help of Coccinelle.

Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220521111145.81697-90-Julia.Lawall@inria.fr
This commit is contained in:
Julia Lawall 2022-05-21 13:11:40 +02:00 committed by Jani Nikula
parent 991dcb89ca
commit 8ae6649079
4 changed files with 4 additions and 4 deletions
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2
drivers/gpu/drm/i915/display/intel_color.c
View File

@ -1638,7 +1638,7 @@ static u32 icl_gamma_mode(const struct intel_crtc_state *crtc_state)
/*
* Enable 10bit gamma for D13
* ToDo: Extend to Logarithmic Gamma once the new UAPI
* is acccepted and implemented by a userspace consumer
* is accepted and implemented by a userspace consumer
*/
else if (DISPLAY_VER(i915) >= 13)
gamma_mode |= GAMMA_MODE_MODE_10BIT;

2
drivers/gpu/drm/i915/display/intel_pps.c
View File

@ -509,7 +509,7 @@ static void wait_panel_power_cycle(struct intel_dp *intel_dp)
drm_dbg_kms(&i915->drm, "Wait for panel power cycle\n");
/* take the difference of currrent time and panel power off time
/* take the difference of current time and panel power off time
* and then make panel wait for t11_t12 if needed. */
panel_power_on_time = ktime_get_boottime();
panel_power_off_duration = ktime_ms_delta(panel_power_on_time, intel_dp->pps.panel_power_off_time);

2
drivers/gpu/drm/i915/gt/intel_execlists_submission.c
View File

@ -1352,7 +1352,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
* submission. If we don't cancel the timer now,
* we will see that the timer has expired and
* reschedule the tasklet; continually until the
* next context switch or other preeemption event.
* next context switch or other preemption event.
*
* Since we have decided to reschedule based on
* consumption of this timeslice, if we submit the

2
drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
View File

@ -555,7 +555,7 @@ int intel_guc_log_relay_open(struct intel_guc_log *log)
/*
* We require SSE 4.1 for fast reads from the GuC log buffer and
* it should be present on the chipsets supporting GuC based
* submisssions.
* submissions.
*/
if (!i915_has_memcpy_from_wc()) {
ret = -ENXIO;