pinctrl: Add one-register-per-pin type device tree based pinctrl driver
Add one-register-per-pin type device tree based pinctrl driver. This driver has been tested on omap2+ series of processors, where there is either an 8 or 16-bit padconf register for each pin. Support for other similar pinmux controllers can be added. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Tony Lindgren
Linus Walleij
parent
3923040bd1
commit
8b8b091bf0
93
Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
Normal file
93
Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
Normal file
@ -0,0 +1,93 @@
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One-register-per-pin type device tree based pinctrl driver
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Required properties:
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- compatible : "pinctrl-single"
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- reg : offset and length of the register set for the mux registers
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- pinctrl-single,register-width : pinmux register access width in bits
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- pinctrl-single,function-mask : mask of allowed pinmux function bits
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in the pinmux register
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Optional properties:
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- pinctrl-single,function-off : function off mode for disabled state if
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available and same for all registers; if not specified, disabling of
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pin functions is ignored
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This driver assumes that there is only one register for each pin,
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and uses the common pinctrl bindings as specified in the pinctrl-bindings.txt
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document in this directory.
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The pin configuration nodes for pinctrl-single are specified as pinctrl
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register offset and value pairs using pinctrl-single,pins. Only the bits
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specified in pinctrl-single,function-mask are updated. For example, setting
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a pin for a device could be done with:
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pinctrl-single,pins = <0xdc 0x118>;
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Where 0xdc is the offset from the pinctrl register base address for the
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device pinctrl register, and 0x118 contains the desired value of the
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pinctrl register. See the device example and static board pins example
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below for more information.
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Example:
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/* SoC common file */
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/* first controller instance for pins in core domain */
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pmx_core: pinmux@4a100040 {
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compatible = "pinctrl-single";
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reg = <0x4a100040 0x0196>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,register-width = <16>;
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pinctrl-single,function-mask = <0xffff>;
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};
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/* second controller instance for pins in wkup domain */
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pmx_wkup: pinmux@4a31e040 {
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compatible = "pinctrl-single;
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reg = <0x4a31e040 0x0038>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,register-width = <16>;
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pinctrl-single,function-mask = <0xffff>;
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};
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/* board specific .dts file */
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&pmx_core {
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/*
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* map all board specific static pins enabled by the pinctrl driver
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* itself during the boot (or just set them up in the bootloader)
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*/
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pinctrl-names = "default";
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pinctrl-0 = <&board_pins>;
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board_pins: pinmux_board_pins {
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pinctrl-single,pins = <
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0x6c 0xf
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0x6e 0xf
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0x70 0xf
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0x72 0xf
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>;
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};
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/* map uart2 pins */
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uart2_pins: pinmux_uart2_pins {
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pinctrl-single,pins = <
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0xd8 0x118
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0xda 0
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0xdc 0x118
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0xde 0
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>;
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};
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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};
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@ -102,6 +102,14 @@ config PINCTRL_PXA910
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select PINCTRL_PXA3xx
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select PINCONF
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config PINCTRL_SINGLE
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tristate "One-register-per-pin type device tree based pinctrl driver"
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depends on OF
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select PINMUX
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select PINCONF
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help
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This selects the device tree based generic pinctrl driver.
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config PINCTRL_SIRF
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bool "CSR SiRFprimaII pin controller driver"
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depends on ARCH_PRIMA2
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@ -22,6 +22,7 @@ obj-$(CONFIG_PINCTRL_NOMADIK) += pinctrl-nomadik.o
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obj-$(CONFIG_PINCTRL_DB8500) += pinctrl-nomadik-db8500.o
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obj-$(CONFIG_PINCTRL_PXA168) += pinctrl-pxa168.o
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obj-$(CONFIG_PINCTRL_PXA910) += pinctrl-pxa910.o
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obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
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obj-$(CONFIG_PINCTRL_SIRF) += pinctrl-sirf.o
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obj-$(CONFIG_PINCTRL_TEGRA) += pinctrl-tegra.o
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obj-$(CONFIG_PINCTRL_TEGRA20) += pinctrl-tegra20.o
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987
drivers/pinctrl/pinctrl-single.c
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987
drivers/pinctrl/pinctrl-single.c
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@ -0,0 +1,987 @@
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/*
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* Generic device tree based pinctrl driver for one register per pin
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* type pinmux controllers
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*
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* Copyright (C) 2012 Texas Instruments, Inc.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/list.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_address.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include "core.h"
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#define DRIVER_NAME "pinctrl-single"
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#define PCS_MUX_NAME "pinctrl-single,pins"
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#define PCS_REG_NAME_LEN ((sizeof(unsigned long) * 2) + 1)
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#define PCS_OFF_DISABLED ~0U
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/**
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* struct pcs_pingroup - pingroups for a function
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* @np: pingroup device node pointer
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* @name: pingroup name
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* @gpins: array of the pins in the group
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* @ngpins: number of pins in the group
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* @node: list node
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*/
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struct pcs_pingroup {
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struct device_node *np;
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const char *name;
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int *gpins;
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int ngpins;
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struct list_head node;
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};
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/**
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* struct pcs_func_vals - mux function register offset and value pair
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* @reg: register virtual address
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* @val: register value
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*/
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struct pcs_func_vals {
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void __iomem *reg;
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unsigned val;
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};
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/**
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* struct pcs_function - pinctrl function
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* @name: pinctrl function name
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* @vals: register and vals array
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* @nvals: number of entries in vals array
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* @pgnames: array of pingroup names the function uses
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* @npgnames: number of pingroup names the function uses
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* @node: list node
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*/
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struct pcs_function {
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const char *name;
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struct pcs_func_vals *vals;
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unsigned nvals;
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const char **pgnames;
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int npgnames;
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struct list_head node;
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};
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/**
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* struct pcs_data - wrapper for data needed by pinctrl framework
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* @pa: pindesc array
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* @cur: index to current element
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*
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* REVISIT: We should be able to drop this eventually by adding
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* support for registering pins individually in the pinctrl
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* framework for those drivers that don't need a static array.
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*/
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struct pcs_data {
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struct pinctrl_pin_desc *pa;
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int cur;
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};
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/**
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* struct pcs_name - register name for a pin
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* @name: name of the pinctrl register
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*
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* REVISIT: We may want to make names optional in the pinctrl
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* framework as some drivers may not care about pin names to
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* avoid kernel bloat. The pin names can be deciphered by user
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* space tools using debugfs based on the register address and
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* SoC packaging information.
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*/
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struct pcs_name {
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char name[PCS_REG_NAME_LEN];
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};
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/**
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* struct pcs_device - pinctrl device instance
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* @res: resources
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* @base: virtual address of the controller
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* @size: size of the ioremapped area
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* @dev: device entry
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* @pctl: pin controller device
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* @mutex: mutex protecting the lists
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* @width: bits per mux register
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* @fmask: function register mask
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* @fshift: function register shift
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* @foff: value to turn mux off
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* @fmax: max number of functions in fmask
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* @names: array of register names for pins
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* @pins: physical pins on the SoC
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* @pgtree: pingroup index radix tree
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* @ftree: function index radix tree
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* @pingroups: list of pingroups
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* @functions: list of functions
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* @ngroups: number of pingroups
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* @nfuncs: number of functions
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* @desc: pin controller descriptor
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* @read: register read function to use
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* @write: register write function to use
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*/
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struct pcs_device {
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struct resource *res;
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void __iomem *base;
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unsigned size;
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struct device *dev;
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struct pinctrl_dev *pctl;
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struct mutex mutex;
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unsigned width;
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unsigned fmask;
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unsigned fshift;
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unsigned foff;
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unsigned fmax;
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struct pcs_name *names;
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struct pcs_data pins;
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struct radix_tree_root pgtree;
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struct radix_tree_root ftree;
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struct list_head pingroups;
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struct list_head functions;
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unsigned ngroups;
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unsigned nfuncs;
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struct pinctrl_desc desc;
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unsigned (*read)(void __iomem *reg);
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void (*write)(unsigned val, void __iomem *reg);
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};
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/*
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* REVISIT: Reads and writes could eventually use regmap or something
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* generic. But at least on omaps, some mux registers are performance
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* critical as they may need to be remuxed every time before and after
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* idle. Adding tests for register access width for every read and
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* write like regmap is doing is not desired, and caching the registers
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* does not help in this case.
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*/
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static unsigned __maybe_unused pcs_readb(void __iomem *reg)
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{
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return readb(reg);
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}
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static unsigned __maybe_unused pcs_readw(void __iomem *reg)
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{
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return readw(reg);
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}
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static unsigned __maybe_unused pcs_readl(void __iomem *reg)
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{
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return readl(reg);
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}
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static void __maybe_unused pcs_writeb(unsigned val, void __iomem *reg)
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{
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writeb(val, reg);
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}
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static void __maybe_unused pcs_writew(unsigned val, void __iomem *reg)
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{
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writew(val, reg);
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}
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static void __maybe_unused pcs_writel(unsigned val, void __iomem *reg)
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{
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writel(val, reg);
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}
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static int pcs_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct pcs_device *pcs;
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pcs = pinctrl_dev_get_drvdata(pctldev);
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return pcs->ngroups;
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}
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static const char *pcs_get_group_name(struct pinctrl_dev *pctldev,
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unsigned gselector)
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{
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struct pcs_device *pcs;
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struct pcs_pingroup *group;
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pcs = pinctrl_dev_get_drvdata(pctldev);
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group = radix_tree_lookup(&pcs->pgtree, gselector);
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if (!group) {
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dev_err(pcs->dev, "%s could not find pingroup%i\n",
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__func__, gselector);
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return NULL;
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}
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return group->name;
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}
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static int pcs_get_group_pins(struct pinctrl_dev *pctldev,
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unsigned gselector,
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const unsigned **pins,
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unsigned *npins)
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{
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struct pcs_device *pcs;
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struct pcs_pingroup *group;
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pcs = pinctrl_dev_get_drvdata(pctldev);
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group = radix_tree_lookup(&pcs->pgtree, gselector);
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if (!group) {
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dev_err(pcs->dev, "%s could not find pingroup%i\n",
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__func__, gselector);
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return -EINVAL;
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}
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*pins = group->gpins;
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*npins = group->ngpins;
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return 0;
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}
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static void pcs_pin_dbg_show(struct pinctrl_dev *pctldev,
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struct seq_file *s,
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unsigned offset)
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{
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seq_printf(s, " " DRIVER_NAME);
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}
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static void pcs_dt_free_map(struct pinctrl_dev *pctldev,
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struct pinctrl_map *map, unsigned num_maps)
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{
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struct pcs_device *pcs;
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pcs = pinctrl_dev_get_drvdata(pctldev);
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devm_kfree(pcs->dev, map);
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}
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static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev,
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struct device_node *np_config,
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struct pinctrl_map **map, unsigned *num_maps);
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static struct pinctrl_ops pcs_pinctrl_ops = {
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.get_groups_count = pcs_get_groups_count,
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.get_group_name = pcs_get_group_name,
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.get_group_pins = pcs_get_group_pins,
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.pin_dbg_show = pcs_pin_dbg_show,
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.dt_node_to_map = pcs_dt_node_to_map,
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.dt_free_map = pcs_dt_free_map,
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};
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static int pcs_get_functions_count(struct pinctrl_dev *pctldev)
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{
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struct pcs_device *pcs;
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pcs = pinctrl_dev_get_drvdata(pctldev);
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return pcs->nfuncs;
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}
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static const char *pcs_get_function_name(struct pinctrl_dev *pctldev,
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unsigned fselector)
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{
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struct pcs_device *pcs;
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struct pcs_function *func;
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pcs = pinctrl_dev_get_drvdata(pctldev);
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func = radix_tree_lookup(&pcs->ftree, fselector);
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if (!func) {
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dev_err(pcs->dev, "%s could not find function%i\n",
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__func__, fselector);
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return NULL;
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}
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return func->name;
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}
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static int pcs_get_function_groups(struct pinctrl_dev *pctldev,
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unsigned fselector,
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const char * const **groups,
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unsigned * const ngroups)
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{
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struct pcs_device *pcs;
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struct pcs_function *func;
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pcs = pinctrl_dev_get_drvdata(pctldev);
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func = radix_tree_lookup(&pcs->ftree, fselector);
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if (!func) {
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dev_err(pcs->dev, "%s could not find function%i\n",
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__func__, fselector);
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return -EINVAL;
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}
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*groups = func->pgnames;
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*ngroups = func->npgnames;
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return 0;
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}
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static int pcs_enable(struct pinctrl_dev *pctldev, unsigned fselector,
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unsigned group)
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{
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struct pcs_device *pcs;
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struct pcs_function *func;
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int i;
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pcs = pinctrl_dev_get_drvdata(pctldev);
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func = radix_tree_lookup(&pcs->ftree, fselector);
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if (!func)
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return -EINVAL;
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dev_dbg(pcs->dev, "enabling %s function%i\n",
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func->name, fselector);
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for (i = 0; i < func->nvals; i++) {
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struct pcs_func_vals *vals;
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unsigned val;
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vals = &func->vals[i];
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val = pcs->read(vals->reg);
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val &= ~pcs->fmask;
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val |= vals->val;
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pcs->write(val, vals->reg);
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}
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return 0;
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}
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static void pcs_disable(struct pinctrl_dev *pctldev, unsigned fselector,
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unsigned group)
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{
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struct pcs_device *pcs;
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struct pcs_function *func;
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int i;
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pcs = pinctrl_dev_get_drvdata(pctldev);
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func = radix_tree_lookup(&pcs->ftree, fselector);
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if (!func) {
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dev_err(pcs->dev, "%s could not find function%i\n",
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__func__, fselector);
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return;
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}
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/*
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* Ignore disable if function-off is not specified. Some hardware
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* does not have clearly defined disable function. For pin specific
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* off modes, you can use alternate named states as described in
|
||||
* pinctrl-bindings.txt.
|
||||
*/
|
||||
if (pcs->foff == PCS_OFF_DISABLED) {
|
||||
dev_dbg(pcs->dev, "ignoring disable for %s function%i\n",
|
||||
func->name, fselector);
|
||||
return;
|
||||
}
|
||||
|
||||
dev_dbg(pcs->dev, "disabling function%i %s\n",
|
||||
fselector, func->name);
|
||||
|
||||
for (i = 0; i < func->nvals; i++) {
|
||||
struct pcs_func_vals *vals;
|
||||
unsigned val;
|
||||
|
||||
vals = &func->vals[i];
|
||||
val = pcs->read(vals->reg);
|
||||
val &= ~pcs->fmask;
|
||||
val |= pcs->foff << pcs->fshift;
|
||||
pcs->write(val, vals->reg);
|
||||
}
|
||||
}
|
||||
|
||||
static int pcs_request_gpio(struct pinctrl_dev *pctldev,
|
||||
struct pinctrl_gpio_range *range, unsigned offset)
|
||||
{
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
|
||||
static struct pinmux_ops pcs_pinmux_ops = {
|
||||
.get_functions_count = pcs_get_functions_count,
|
||||
.get_function_name = pcs_get_function_name,
|
||||
.get_function_groups = pcs_get_function_groups,
|
||||
.enable = pcs_enable,
|
||||
.disable = pcs_disable,
|
||||
.gpio_request_enable = pcs_request_gpio,
|
||||
};
|
||||
|
||||
static int pcs_pinconf_get(struct pinctrl_dev *pctldev,
|
||||
unsigned pin, unsigned long *config)
|
||||
{
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
|
||||
static int pcs_pinconf_set(struct pinctrl_dev *pctldev,
|
||||
unsigned pin, unsigned long config)
|
||||
{
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
|
||||
static int pcs_pinconf_group_get(struct pinctrl_dev *pctldev,
|
||||
unsigned group, unsigned long *config)
|
||||
{
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
|
||||
static int pcs_pinconf_group_set(struct pinctrl_dev *pctldev,
|
||||
unsigned group, unsigned long config)
|
||||
{
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
|
||||
static void pcs_pinconf_dbg_show(struct pinctrl_dev *pctldev,
|
||||
struct seq_file *s, unsigned offset)
|
||||
{
|
||||
}
|
||||
|
||||
static void pcs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
|
||||
struct seq_file *s, unsigned selector)
|
||||
{
|
||||
}
|
||||
|
||||
static struct pinconf_ops pcs_pinconf_ops = {
|
||||
.pin_config_get = pcs_pinconf_get,
|
||||
.pin_config_set = pcs_pinconf_set,
|
||||
.pin_config_group_get = pcs_pinconf_group_get,
|
||||
.pin_config_group_set = pcs_pinconf_group_set,
|
||||
.pin_config_dbg_show = pcs_pinconf_dbg_show,
|
||||
.pin_config_group_dbg_show = pcs_pinconf_group_dbg_show,
|
||||
};
|
||||
|
||||
/**
|
||||
* pcs_add_pin() - add a pin to the static per controller pin array
|
||||
* @pcs: pcs driver instance
|
||||
* @offset: register offset from base
|
||||
*/
|
||||
static int __devinit pcs_add_pin(struct pcs_device *pcs, unsigned offset)
|
||||
{
|
||||
struct pinctrl_pin_desc *pin;
|
||||
struct pcs_name *pn;
|
||||
int i;
|
||||
|
||||
i = pcs->pins.cur;
|
||||
if (i >= pcs->desc.npins) {
|
||||
dev_err(pcs->dev, "too many pins, max %i\n",
|
||||
pcs->desc.npins);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
pin = &pcs->pins.pa[i];
|
||||
pn = &pcs->names[i];
|
||||
sprintf(pn->name, "%lx",
|
||||
(unsigned long)pcs->res->start + offset);
|
||||
pin->name = pn->name;
|
||||
pin->number = i;
|
||||
pcs->pins.cur++;
|
||||
|
||||
return i;
|
||||
}
|
||||
|
||||
/**
|
||||
* pcs_allocate_pin_table() - adds all the pins for the pinctrl driver
|
||||
* @pcs: pcs driver instance
|
||||
*
|
||||
* In case of errors, resources are freed in pcs_free_resources.
|
||||
*
|
||||
* If your hardware needs holes in the address space, then just set
|
||||
* up multiple driver instances.
|
||||
*/
|
||||
static int __devinit pcs_allocate_pin_table(struct pcs_device *pcs)
|
||||
{
|
||||
int mux_bytes, nr_pins, i;
|
||||
|
||||
mux_bytes = pcs->width / BITS_PER_BYTE;
|
||||
nr_pins = pcs->size / mux_bytes;
|
||||
|
||||
dev_dbg(pcs->dev, "allocating %i pins\n", nr_pins);
|
||||
pcs->pins.pa = devm_kzalloc(pcs->dev,
|
||||
sizeof(*pcs->pins.pa) * nr_pins,
|
||||
GFP_KERNEL);
|
||||
if (!pcs->pins.pa)
|
||||
return -ENOMEM;
|
||||
|
||||
pcs->names = devm_kzalloc(pcs->dev,
|
||||
sizeof(struct pcs_name) * nr_pins,
|
||||
GFP_KERNEL);
|
||||
if (!pcs->names)
|
||||
return -ENOMEM;
|
||||
|
||||
pcs->desc.pins = pcs->pins.pa;
|
||||
pcs->desc.npins = nr_pins;
|
||||
|
||||
for (i = 0; i < pcs->desc.npins; i++) {
|
||||
unsigned offset;
|
||||
int res;
|
||||
|
||||
offset = i * mux_bytes;
|
||||
res = pcs_add_pin(pcs, offset);
|
||||
if (res < 0) {
|
||||
dev_err(pcs->dev, "error adding pins: %i\n", res);
|
||||
return res;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* pcs_add_function() - adds a new function to the function list
|
||||
* @pcs: pcs driver instance
|
||||
* @np: device node of the mux entry
|
||||
* @name: name of the function
|
||||
* @vals: array of mux register value pairs used by the function
|
||||
* @nvals: number of mux register value pairs
|
||||
* @pgnames: array of pingroup names for the function
|
||||
* @npgnames: number of pingroup names
|
||||
*/
|
||||
static struct pcs_function *pcs_add_function(struct pcs_device *pcs,
|
||||
struct device_node *np,
|
||||
const char *name,
|
||||
struct pcs_func_vals *vals,
|
||||
unsigned nvals,
|
||||
const char **pgnames,
|
||||
unsigned npgnames)
|
||||
{
|
||||
struct pcs_function *function;
|
||||
|
||||
function = devm_kzalloc(pcs->dev, sizeof(*function), GFP_KERNEL);
|
||||
if (!function)
|
||||
return NULL;
|
||||
|
||||
function->name = name;
|
||||
function->vals = vals;
|
||||
function->nvals = nvals;
|
||||
function->pgnames = pgnames;
|
||||
function->npgnames = npgnames;
|
||||
|
||||
mutex_lock(&pcs->mutex);
|
||||
list_add_tail(&function->node, &pcs->functions);
|
||||
radix_tree_insert(&pcs->ftree, pcs->nfuncs, function);
|
||||
pcs->nfuncs++;
|
||||
mutex_unlock(&pcs->mutex);
|
||||
|
||||
return function;
|
||||
}
|
||||
|
||||
static void pcs_remove_function(struct pcs_device *pcs,
|
||||
struct pcs_function *function)
|
||||
{
|
||||
int i;
|
||||
|
||||
mutex_lock(&pcs->mutex);
|
||||
for (i = 0; i < pcs->nfuncs; i++) {
|
||||
struct pcs_function *found;
|
||||
|
||||
found = radix_tree_lookup(&pcs->ftree, i);
|
||||
if (found == function)
|
||||
radix_tree_delete(&pcs->ftree, i);
|
||||
}
|
||||
list_del(&function->node);
|
||||
mutex_unlock(&pcs->mutex);
|
||||
}
|
||||
|
||||
/**
|
||||
* pcs_add_pingroup() - add a pingroup to the pingroup list
|
||||
* @pcs: pcs driver instance
|
||||
* @np: device node of the mux entry
|
||||
* @name: name of the pingroup
|
||||
* @gpins: array of the pins that belong to the group
|
||||
* @ngpins: number of pins in the group
|
||||
*/
|
||||
static int pcs_add_pingroup(struct pcs_device *pcs,
|
||||
struct device_node *np,
|
||||
const char *name,
|
||||
int *gpins,
|
||||
int ngpins)
|
||||
{
|
||||
struct pcs_pingroup *pingroup;
|
||||
|
||||
pingroup = devm_kzalloc(pcs->dev, sizeof(*pingroup), GFP_KERNEL);
|
||||
if (!pingroup)
|
||||
return -ENOMEM;
|
||||
|
||||
pingroup->name = name;
|
||||
pingroup->np = np;
|
||||
pingroup->gpins = gpins;
|
||||
pingroup->ngpins = ngpins;
|
||||
|
||||
mutex_lock(&pcs->mutex);
|
||||
list_add_tail(&pingroup->node, &pcs->pingroups);
|
||||
radix_tree_insert(&pcs->pgtree, pcs->ngroups, pingroup);
|
||||
pcs->ngroups++;
|
||||
mutex_unlock(&pcs->mutex);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* pcs_get_pin_by_offset() - get a pin index based on the register offset
|
||||
* @pcs: pcs driver instance
|
||||
* @offset: register offset from the base
|
||||
*
|
||||
* Note that this is OK as long as the pins are in a static array.
|
||||
*/
|
||||
static int pcs_get_pin_by_offset(struct pcs_device *pcs, unsigned offset)
|
||||
{
|
||||
unsigned index;
|
||||
|
||||
if (offset >= pcs->size) {
|
||||
dev_err(pcs->dev, "mux offset out of range: 0x%x (0x%x)\n",
|
||||
offset, pcs->size);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
index = offset / (pcs->width / BITS_PER_BYTE);
|
||||
|
||||
return index;
|
||||
}
|
||||
|
||||
/**
|
||||
* smux_parse_one_pinctrl_entry() - parses a device tree mux entry
|
||||
* @pcs: pinctrl driver instance
|
||||
* @np: device node of the mux entry
|
||||
* @map: map entry
|
||||
* @pgnames: pingroup names
|
||||
*
|
||||
* Note that this binding currently supports only sets of one register + value.
|
||||
*
|
||||
* Also note that this driver tries to avoid understanding pin and function
|
||||
* names because of the extra bloat they would cause especially in the case of
|
||||
* a large number of pins. This driver just sets what is specified for the board
|
||||
* in the .dts file. Further user space debugging tools can be developed to
|
||||
* decipher the pin and function names using debugfs.
|
||||
*
|
||||
* If you are concerned about the boot time, set up the static pins in
|
||||
* the bootloader, and only set up selected pins as device tree entries.
|
||||
*/
|
||||
static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs,
|
||||
struct device_node *np,
|
||||
struct pinctrl_map **map,
|
||||
const char **pgnames)
|
||||
{
|
||||
struct pcs_func_vals *vals;
|
||||
const __be32 *mux;
|
||||
int size, rows, *pins, index = 0, found = 0, res = -ENOMEM;
|
||||
struct pcs_function *function;
|
||||
|
||||
mux = of_get_property(np, PCS_MUX_NAME, &size);
|
||||
if ((!mux) || (size < sizeof(*mux) * 2)) {
|
||||
dev_err(pcs->dev, "bad data for mux %s\n",
|
||||
np->name);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
size /= sizeof(*mux); /* Number of elements in array */
|
||||
rows = size / 2; /* Each row is a key value pair */
|
||||
|
||||
vals = devm_kzalloc(pcs->dev, sizeof(*vals) * rows, GFP_KERNEL);
|
||||
if (!vals)
|
||||
return -ENOMEM;
|
||||
|
||||
pins = devm_kzalloc(pcs->dev, sizeof(*pins) * rows, GFP_KERNEL);
|
||||
if (!pins)
|
||||
goto free_vals;
|
||||
|
||||
while (index < size) {
|
||||
unsigned offset, val;
|
||||
int pin;
|
||||
|
||||
offset = be32_to_cpup(mux + index++);
|
||||
val = be32_to_cpup(mux + index++);
|
||||
vals[found].reg = pcs->base + offset;
|
||||
vals[found].val = val;
|
||||
|
||||
pin = pcs_get_pin_by_offset(pcs, offset);
|
||||
if (pin < 0) {
|
||||
dev_err(pcs->dev,
|
||||
"could not add functions for %s %ux\n",
|
||||
np->name, offset);
|
||||
break;
|
||||
}
|
||||
pins[found++] = pin;
|
||||
}
|
||||
|
||||
pgnames[0] = np->name;
|
||||
function = pcs_add_function(pcs, np, np->name, vals, found, pgnames, 1);
|
||||
if (!function)
|
||||
goto free_pins;
|
||||
|
||||
res = pcs_add_pingroup(pcs, np, np->name, pins, found);
|
||||
if (res < 0)
|
||||
goto free_function;
|
||||
|
||||
(*map)->type = PIN_MAP_TYPE_MUX_GROUP;
|
||||
(*map)->data.mux.group = np->name;
|
||||
(*map)->data.mux.function = np->name;
|
||||
|
||||
return 0;
|
||||
|
||||
free_function:
|
||||
pcs_remove_function(pcs, function);
|
||||
|
||||
free_pins:
|
||||
devm_kfree(pcs->dev, pins);
|
||||
|
||||
free_vals:
|
||||
devm_kfree(pcs->dev, vals);
|
||||
|
||||
return res;
|
||||
}
|
||||
/**
|
||||
* pcs_dt_node_to_map() - allocates and parses pinctrl maps
|
||||
* @pctldev: pinctrl instance
|
||||
* @np_config: device tree pinmux entry
|
||||
* @map: array of map entries
|
||||
* @num_maps: number of maps
|
||||
*/
|
||||
static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev,
|
||||
struct device_node *np_config,
|
||||
struct pinctrl_map **map, unsigned *num_maps)
|
||||
{
|
||||
struct pcs_device *pcs;
|
||||
const char **pgnames;
|
||||
int ret;
|
||||
|
||||
pcs = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
*map = devm_kzalloc(pcs->dev, sizeof(**map), GFP_KERNEL);
|
||||
if (!map)
|
||||
return -ENOMEM;
|
||||
|
||||
*num_maps = 0;
|
||||
|
||||
pgnames = devm_kzalloc(pcs->dev, sizeof(*pgnames), GFP_KERNEL);
|
||||
if (!pgnames) {
|
||||
ret = -ENOMEM;
|
||||
goto free_map;
|
||||
}
|
||||
|
||||
ret = pcs_parse_one_pinctrl_entry(pcs, np_config, map, pgnames);
|
||||
if (ret < 0) {
|
||||
dev_err(pcs->dev, "no pins entries for %s\n",
|
||||
np_config->name);
|
||||
goto free_pgnames;
|
||||
}
|
||||
*num_maps = 1;
|
||||
|
||||
return 0;
|
||||
|
||||
free_pgnames:
|
||||
devm_kfree(pcs->dev, pgnames);
|
||||
free_map:
|
||||
devm_kfree(pcs->dev, *map);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* pcs_free_funcs() - free memory used by functions
|
||||
* @pcs: pcs driver instance
|
||||
*/
|
||||
static void pcs_free_funcs(struct pcs_device *pcs)
|
||||
{
|
||||
struct list_head *pos, *tmp;
|
||||
int i;
|
||||
|
||||
mutex_lock(&pcs->mutex);
|
||||
for (i = 0; i < pcs->nfuncs; i++) {
|
||||
struct pcs_function *func;
|
||||
|
||||
func = radix_tree_lookup(&pcs->ftree, i);
|
||||
if (!func)
|
||||
continue;
|
||||
radix_tree_delete(&pcs->ftree, i);
|
||||
}
|
||||
list_for_each_safe(pos, tmp, &pcs->functions) {
|
||||
struct pcs_function *function;
|
||||
|
||||
function = list_entry(pos, struct pcs_function, node);
|
||||
list_del(&function->node);
|
||||
}
|
||||
mutex_unlock(&pcs->mutex);
|
||||
}
|
||||
|
||||
/**
|
||||
* pcs_free_pingroups() - free memory used by pingroups
|
||||
* @pcs: pcs driver instance
|
||||
*/
|
||||
static void pcs_free_pingroups(struct pcs_device *pcs)
|
||||
{
|
||||
struct list_head *pos, *tmp;
|
||||
int i;
|
||||
|
||||
mutex_lock(&pcs->mutex);
|
||||
for (i = 0; i < pcs->ngroups; i++) {
|
||||
struct pcs_pingroup *pingroup;
|
||||
|
||||
pingroup = radix_tree_lookup(&pcs->pgtree, i);
|
||||
if (!pingroup)
|
||||
continue;
|
||||
radix_tree_delete(&pcs->pgtree, i);
|
||||
}
|
||||
list_for_each_safe(pos, tmp, &pcs->pingroups) {
|
||||
struct pcs_pingroup *pingroup;
|
||||
|
||||
pingroup = list_entry(pos, struct pcs_pingroup, node);
|
||||
list_del(&pingroup->node);
|
||||
}
|
||||
mutex_unlock(&pcs->mutex);
|
||||
}
|
||||
|
||||
/**
|
||||
* pcs_free_resources() - free memory used by this driver
|
||||
* @pcs: pcs driver instance
|
||||
*/
|
||||
static void pcs_free_resources(struct pcs_device *pcs)
|
||||
{
|
||||
if (pcs->pctl)
|
||||
pinctrl_unregister(pcs->pctl);
|
||||
|
||||
pcs_free_funcs(pcs);
|
||||
pcs_free_pingroups(pcs);
|
||||
}
|
||||
|
||||
#define PCS_GET_PROP_U32(name, reg, err) \
|
||||
do { \
|
||||
ret = of_property_read_u32(np, name, reg); \
|
||||
if (ret) { \
|
||||
dev_err(pcs->dev, err); \
|
||||
return ret; \
|
||||
} \
|
||||
} while (0);
|
||||
|
||||
static struct of_device_id pcs_of_match[];
|
||||
|
||||
static int __devinit pcs_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
const struct of_device_id *match;
|
||||
struct resource *res;
|
||||
struct pcs_device *pcs;
|
||||
int ret;
|
||||
|
||||
match = of_match_device(pcs_of_match, &pdev->dev);
|
||||
if (!match)
|
||||
return -EINVAL;
|
||||
|
||||
pcs = devm_kzalloc(&pdev->dev, sizeof(*pcs), GFP_KERNEL);
|
||||
if (!pcs) {
|
||||
dev_err(&pdev->dev, "could not allocate\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
pcs->dev = &pdev->dev;
|
||||
mutex_init(&pcs->mutex);
|
||||
INIT_LIST_HEAD(&pcs->pingroups);
|
||||
INIT_LIST_HEAD(&pcs->functions);
|
||||
|
||||
PCS_GET_PROP_U32("pinctrl-single,register-width", &pcs->width,
|
||||
"register width not specified\n");
|
||||
|
||||
PCS_GET_PROP_U32("pinctrl-single,function-mask", &pcs->fmask,
|
||||
"function register mask not specified\n");
|
||||
pcs->fshift = ffs(pcs->fmask) - 1;
|
||||
pcs->fmax = pcs->fmask >> pcs->fshift;
|
||||
|
||||
ret = of_property_read_u32(np, "pinctrl-single,function-off",
|
||||
&pcs->foff);
|
||||
if (ret)
|
||||
pcs->foff = PCS_OFF_DISABLED;
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!res) {
|
||||
dev_err(pcs->dev, "could not get resource\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
pcs->res = devm_request_mem_region(pcs->dev, res->start,
|
||||
resource_size(res), DRIVER_NAME);
|
||||
if (!pcs->res) {
|
||||
dev_err(pcs->dev, "could not get mem_region\n");
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
pcs->size = resource_size(pcs->res);
|
||||
pcs->base = devm_ioremap(pcs->dev, pcs->res->start, pcs->size);
|
||||
if (!pcs->base) {
|
||||
dev_err(pcs->dev, "could not ioremap\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
INIT_RADIX_TREE(&pcs->pgtree, GFP_KERNEL);
|
||||
INIT_RADIX_TREE(&pcs->ftree, GFP_KERNEL);
|
||||
platform_set_drvdata(pdev, pcs);
|
||||
|
||||
switch (pcs->width) {
|
||||
case 8:
|
||||
pcs->read = pcs_readb;
|
||||
pcs->write = pcs_writeb;
|
||||
break;
|
||||
case 16:
|
||||
pcs->read = pcs_readw;
|
||||
pcs->write = pcs_writew;
|
||||
break;
|
||||
case 32:
|
||||
pcs->read = pcs_readl;
|
||||
pcs->write = pcs_writel;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
pcs->desc.name = DRIVER_NAME;
|
||||
pcs->desc.pctlops = &pcs_pinctrl_ops;
|
||||
pcs->desc.pmxops = &pcs_pinmux_ops;
|
||||
pcs->desc.confops = &pcs_pinconf_ops;
|
||||
pcs->desc.owner = THIS_MODULE;
|
||||
|
||||
ret = pcs_allocate_pin_table(pcs);
|
||||
if (ret < 0)
|
||||
goto free;
|
||||
|
||||
pcs->pctl = pinctrl_register(&pcs->desc, pcs->dev, pcs);
|
||||
if (!pcs->pctl) {
|
||||
dev_err(pcs->dev, "could not register single pinctrl driver\n");
|
||||
ret = -EINVAL;
|
||||
goto free;
|
||||
}
|
||||
|
||||
dev_info(pcs->dev, "%i pins at pa %p size %u\n",
|
||||
pcs->desc.npins, pcs->base, pcs->size);
|
||||
|
||||
return 0;
|
||||
|
||||
free:
|
||||
pcs_free_resources(pcs);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __devexit pcs_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct pcs_device *pcs = platform_get_drvdata(pdev);
|
||||
|
||||
if (!pcs)
|
||||
return 0;
|
||||
|
||||
pcs_free_resources(pcs);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct of_device_id pcs_of_match[] __devinitdata = {
|
||||
{ .compatible = DRIVER_NAME, },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, pcs_of_match);
|
||||
|
||||
static struct platform_driver pcs_driver = {
|
||||
.probe = pcs_probe,
|
||||
.remove = __devexit_p(pcs_remove),
|
||||
.driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = DRIVER_NAME,
|
||||
.of_match_table = pcs_of_match,
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver(pcs_driver);
|
||||
|
||||
MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
|
||||
MODULE_DESCRIPTION("One-register-per-pin type device tree based pinctrl driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Loading…
Reference in New Issue
Block a user