ASoC: Xilinx fixes
Merge series from Robert Hancock <robert.hancock@calian.com>: There are drivers in mainline for the Xilinx Audio Formatter and Xilinx I2S IP cores. However, because of a few issues, these were only really usable with Xilinx's xlnx_pl_snd_card top-level driver, which is not in mainline (and not suitable for mainline). The fixes in this patchset, for the simple-card layer as well as the Xilinx drivers, now allow these drivers to be properly used with simple-card without any out-of-tree support code.
This commit is contained in:
commit
8bcd0f121b
@ -48,6 +48,15 @@ definitions:
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It is useful for some aCPUs with fixed clocks.
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$ref: /schemas/types.yaml#/definitions/flag
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system-clock-fixed:
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description: |
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Specifies that the clock frequency should not be modified.
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Implied when system-clock-frequency is specified, but can be used when
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a clock is mapped to the device whose frequency cannot or should not be
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changed. When mclk-fs is also specified, this restricts the device to a
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single fixed sampling rate.
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$ref: /schemas/types.yaml#/definitions/flag
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mclk-fs:
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description: |
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Multiplication factor between stream rate and codec mclk.
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@ -134,6 +143,8 @@ definitions:
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$ref: "#/definitions/system-clock-frequency"
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system-clock-direction-out:
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$ref: "#/definitions/system-clock-direction-out"
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system-clock-fixed:
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$ref: "#/definitions/system-clock-fixed"
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required:
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- sound-dai
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@ -25,6 +25,7 @@ struct asoc_simple_dai {
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unsigned int tx_slot_mask;
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unsigned int rx_slot_mask;
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struct clk *clk;
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bool clk_fixed;
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};
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struct asoc_simple_data {
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@ -165,12 +165,15 @@ int asoc_simple_parse_clk(struct device *dev,
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* or device's module clock.
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*/
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clk = devm_get_clk_from_child(dev, node, NULL);
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simple_dai->clk_fixed = of_property_read_bool(
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node, "system-clock-fixed");
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if (!IS_ERR(clk)) {
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simple_dai->sysclk = clk_get_rate(clk);
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simple_dai->clk = clk;
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} else if (!of_property_read_u32(node, "system-clock-frequency", &val)) {
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simple_dai->sysclk = val;
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simple_dai->clk_fixed = true;
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} else {
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clk = devm_get_clk_from_child(dev, dlc->of_node, NULL);
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if (!IS_ERR(clk))
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@ -184,12 +187,29 @@ int asoc_simple_parse_clk(struct device *dev,
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}
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EXPORT_SYMBOL_GPL(asoc_simple_parse_clk);
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static int asoc_simple_check_fixed_sysclk(struct device *dev,
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struct asoc_simple_dai *dai,
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unsigned int *fixed_sysclk)
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{
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if (dai->clk_fixed) {
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if (*fixed_sysclk && *fixed_sysclk != dai->sysclk) {
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dev_err(dev, "inconsistent fixed sysclk rates (%u vs %u)\n",
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*fixed_sysclk, dai->sysclk);
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return -EINVAL;
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}
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*fixed_sysclk = dai->sysclk;
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}
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return 0;
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}
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int asoc_simple_startup(struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
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struct asoc_simple_priv *priv = snd_soc_card_get_drvdata(rtd->card);
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struct simple_dai_props *props = simple_priv_to_props(priv, rtd->num);
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struct asoc_simple_dai *dai;
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unsigned int fixed_sysclk = 0;
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int i1, i2, i;
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int ret;
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@ -197,12 +217,32 @@ int asoc_simple_startup(struct snd_pcm_substream *substream)
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ret = asoc_simple_clk_enable(dai);
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if (ret)
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goto cpu_err;
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ret = asoc_simple_check_fixed_sysclk(rtd->dev, dai, &fixed_sysclk);
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if (ret)
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goto cpu_err;
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}
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for_each_prop_dai_codec(props, i2, dai) {
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ret = asoc_simple_clk_enable(dai);
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if (ret)
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goto codec_err;
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ret = asoc_simple_check_fixed_sysclk(rtd->dev, dai, &fixed_sysclk);
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if (ret)
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goto codec_err;
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}
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if (fixed_sysclk && props->mclk_fs) {
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unsigned int fixed_rate = fixed_sysclk / props->mclk_fs;
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if (fixed_sysclk % props->mclk_fs) {
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dev_err(rtd->dev, "fixed sysclk %u not divisible by mclk_fs %u\n",
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fixed_sysclk, props->mclk_fs);
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return -EINVAL;
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}
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ret = snd_pcm_hw_constraint_minmax(substream->runtime, SNDRV_PCM_HW_PARAM_RATE,
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fixed_rate, fixed_rate);
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if (ret)
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goto codec_err;
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}
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return 0;
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@ -226,31 +266,40 @@ EXPORT_SYMBOL_GPL(asoc_simple_startup);
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void asoc_simple_shutdown(struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
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struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
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struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
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struct asoc_simple_priv *priv = snd_soc_card_get_drvdata(rtd->card);
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struct simple_dai_props *props = simple_priv_to_props(priv, rtd->num);
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struct asoc_simple_dai *dai;
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int i;
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if (props->mclk_fs) {
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snd_soc_dai_set_sysclk(codec_dai, 0, 0, SND_SOC_CLOCK_IN);
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snd_soc_dai_set_sysclk(cpu_dai, 0, 0, SND_SOC_CLOCK_OUT);
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}
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for_each_prop_dai_cpu(props, i, dai) {
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if (props->mclk_fs && !dai->clk_fixed)
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snd_soc_dai_set_sysclk(asoc_rtd_to_cpu(rtd, i),
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0, 0, SND_SOC_CLOCK_IN);
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for_each_prop_dai_cpu(props, i, dai)
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asoc_simple_clk_disable(dai);
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for_each_prop_dai_codec(props, i, dai)
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}
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for_each_prop_dai_codec(props, i, dai) {
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if (props->mclk_fs && !dai->clk_fixed)
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snd_soc_dai_set_sysclk(asoc_rtd_to_codec(rtd, i),
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0, 0, SND_SOC_CLOCK_IN);
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asoc_simple_clk_disable(dai);
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}
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}
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EXPORT_SYMBOL_GPL(asoc_simple_shutdown);
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static int asoc_simple_set_clk_rate(struct asoc_simple_dai *simple_dai,
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static int asoc_simple_set_clk_rate(struct device *dev,
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struct asoc_simple_dai *simple_dai,
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unsigned long rate)
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{
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if (!simple_dai)
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return 0;
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if (simple_dai->clk_fixed && rate != simple_dai->sysclk) {
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dev_err(dev, "dai %s invalid clock rate %lu\n", simple_dai->name, rate);
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return -EINVAL;
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}
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if (!simple_dai->clk)
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return 0;
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@ -275,23 +324,38 @@ int asoc_simple_hw_params(struct snd_pcm_substream *substream,
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mclk_fs = props->mclk_fs;
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if (mclk_fs) {
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struct snd_soc_component *component;
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mclk = params_rate(params) * mclk_fs;
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for_each_prop_dai_codec(props, i, pdai) {
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ret = asoc_simple_set_clk_rate(pdai, mclk);
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ret = asoc_simple_set_clk_rate(rtd->dev, pdai, mclk);
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if (ret < 0)
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return ret;
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}
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for_each_prop_dai_cpu(props, i, pdai) {
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ret = asoc_simple_set_clk_rate(pdai, mclk);
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ret = asoc_simple_set_clk_rate(rtd->dev, pdai, mclk);
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if (ret < 0)
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return ret;
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}
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/* Ensure sysclk is set on all components in case any
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* (such as platform components) are missed by calls to
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* snd_soc_dai_set_sysclk.
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*/
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for_each_rtd_components(rtd, i, component) {
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ret = snd_soc_component_set_sysclk(component, 0, 0,
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mclk, SND_SOC_CLOCK_IN);
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if (ret && ret != -ENOTSUPP)
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return ret;
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}
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for_each_rtd_codec_dais(rtd, i, sdai) {
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ret = snd_soc_dai_set_sysclk(sdai, 0, mclk, SND_SOC_CLOCK_IN);
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if (ret && ret != -ENOTSUPP)
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return ret;
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}
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for_each_rtd_cpu_dais(rtd, i, sdai) {
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ret = snd_soc_dai_set_sysclk(sdai, 0, mclk, SND_SOC_CLOCK_OUT);
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if (ret && ret != -ENOTSUPP)
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@ -84,6 +84,7 @@ struct xlnx_pcm_drv_data {
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struct snd_pcm_substream *play_stream;
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struct snd_pcm_substream *capture_stream;
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struct clk *axi_clk;
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unsigned int sysclk;
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};
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/*
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@ -314,6 +315,15 @@ static irqreturn_t xlnx_s2mm_irq_handler(int irq, void *arg)
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return IRQ_NONE;
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}
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static int xlnx_formatter_set_sysclk(struct snd_soc_component *component,
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int clk_id, int source, unsigned int freq, int dir)
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{
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struct xlnx_pcm_drv_data *adata = dev_get_drvdata(component->dev);
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adata->sysclk = freq;
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return 0;
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}
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static int xlnx_formatter_pcm_open(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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@ -450,11 +460,25 @@ static int xlnx_formatter_pcm_hw_params(struct snd_soc_component *component,
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u64 size;
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct xlnx_pcm_stream_param *stream_data = runtime->private_data;
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struct xlnx_pcm_drv_data *adata = dev_get_drvdata(component->dev);
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active_ch = params_channels(params);
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if (active_ch > stream_data->ch_limit)
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return -EINVAL;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
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adata->sysclk) {
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unsigned int mclk_fs = adata->sysclk / params_rate(params);
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if (adata->sysclk % params_rate(params) != 0) {
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dev_warn(component->dev, "sysclk %u not divisible by rate %u\n",
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adata->sysclk, params_rate(params));
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return -EINVAL;
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}
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writel(mclk_fs, stream_data->mmio + XLNX_AUD_FS_MULTIPLIER);
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}
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE &&
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stream_data->xfer_mode == AES_TO_PCM) {
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val = readl(stream_data->mmio + XLNX_AUD_STS);
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@ -552,6 +576,7 @@ static int xlnx_formatter_pcm_new(struct snd_soc_component *component,
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static const struct snd_soc_component_driver xlnx_asoc_component = {
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.name = DRV_NAME,
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.set_sysclk = xlnx_formatter_set_sysclk,
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.open = xlnx_formatter_pcm_open,
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.close = xlnx_formatter_pcm_close,
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.hw_params = xlnx_formatter_pcm_hw_params,
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@ -18,19 +18,71 @@
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#define DRV_NAME "xlnx_i2s"
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#define I2S_CORE_CTRL_OFFSET 0x08
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#define I2S_CORE_CTRL_32BIT_LRCLK BIT(3)
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#define I2S_CORE_CTRL_ENABLE BIT(0)
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#define I2S_I2STIM_OFFSET 0x20
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#define I2S_CH0_OFFSET 0x30
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#define I2S_I2STIM_VALID_MASK GENMASK(7, 0)
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struct xlnx_i2s_drv_data {
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struct snd_soc_dai_driver dai_drv;
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void __iomem *base;
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unsigned int sysclk;
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u32 data_width;
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u32 channels;
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bool is_32bit_lrclk;
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struct snd_ratnum ratnum;
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struct snd_pcm_hw_constraint_ratnums rate_constraints;
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};
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static int xlnx_i2s_set_sclkout_div(struct snd_soc_dai *cpu_dai,
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int div_id, int div)
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{
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void __iomem *base = snd_soc_dai_get_drvdata(cpu_dai);
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struct xlnx_i2s_drv_data *drv_data = snd_soc_dai_get_drvdata(cpu_dai);
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if (!div || (div & ~I2S_I2STIM_VALID_MASK))
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return -EINVAL;
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writel(div, base + I2S_I2STIM_OFFSET);
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drv_data->sysclk = 0;
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writel(div, drv_data->base + I2S_I2STIM_OFFSET);
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return 0;
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}
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static int xlnx_i2s_set_sysclk(struct snd_soc_dai *dai,
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int clk_id, unsigned int freq, int dir)
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{
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struct xlnx_i2s_drv_data *drv_data = snd_soc_dai_get_drvdata(dai);
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drv_data->sysclk = freq;
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if (freq) {
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unsigned int bits_per_sample;
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if (drv_data->is_32bit_lrclk)
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bits_per_sample = 32;
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else
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bits_per_sample = drv_data->data_width;
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drv_data->ratnum.num = freq / (bits_per_sample * drv_data->channels) / 2;
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drv_data->ratnum.den_step = 1;
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drv_data->ratnum.den_min = 1;
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drv_data->ratnum.den_max = 255;
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drv_data->rate_constraints.rats = &drv_data->ratnum;
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drv_data->rate_constraints.nrats = 1;
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}
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return 0;
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}
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static int xlnx_i2s_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct xlnx_i2s_drv_data *drv_data = snd_soc_dai_get_drvdata(dai);
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if (drv_data->sysclk)
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return snd_pcm_hw_constraint_ratnums(substream->runtime, 0,
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SNDRV_PCM_HW_PARAM_RATE,
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&drv_data->rate_constraints);
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return 0;
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}
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@ -40,13 +92,33 @@ static int xlnx_i2s_hw_params(struct snd_pcm_substream *substream,
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struct snd_soc_dai *i2s_dai)
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{
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u32 reg_off, chan_id;
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void __iomem *base = snd_soc_dai_get_drvdata(i2s_dai);
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struct xlnx_i2s_drv_data *drv_data = snd_soc_dai_get_drvdata(i2s_dai);
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if (drv_data->sysclk) {
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unsigned int bits_per_sample, sclk, sclk_div;
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if (drv_data->is_32bit_lrclk)
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bits_per_sample = 32;
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else
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bits_per_sample = drv_data->data_width;
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sclk = params_rate(params) * bits_per_sample * params_channels(params);
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sclk_div = drv_data->sysclk / sclk / 2;
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if ((drv_data->sysclk % sclk != 0) ||
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!sclk_div || (sclk_div & ~I2S_I2STIM_VALID_MASK)) {
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dev_warn(i2s_dai->dev, "invalid SCLK divisor for sysclk %u and sclk %u\n",
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drv_data->sysclk, sclk);
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return -EINVAL;
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}
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writel(sclk_div, drv_data->base + I2S_I2STIM_OFFSET);
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}
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chan_id = params_channels(params) / 2;
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while (chan_id > 0) {
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reg_off = I2S_CH0_OFFSET + ((chan_id - 1) * 4);
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writel(chan_id, base + reg_off);
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writel(chan_id, drv_data->base + reg_off);
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chan_id--;
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}
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@ -56,18 +128,18 @@ static int xlnx_i2s_hw_params(struct snd_pcm_substream *substream,
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static int xlnx_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *i2s_dai)
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{
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void __iomem *base = snd_soc_dai_get_drvdata(i2s_dai);
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struct xlnx_i2s_drv_data *drv_data = snd_soc_dai_get_drvdata(i2s_dai);
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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writel(1, base + I2S_CORE_CTRL_OFFSET);
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writel(I2S_CORE_CTRL_ENABLE, drv_data->base + I2S_CORE_CTRL_OFFSET);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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writel(0, base + I2S_CORE_CTRL_OFFSET);
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writel(0, drv_data->base + I2S_CORE_CTRL_OFFSET);
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break;
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default:
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return -EINVAL;
|
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@ -78,7 +150,9 @@ static int xlnx_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
|
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|
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static const struct snd_soc_dai_ops xlnx_i2s_dai_ops = {
|
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.trigger = xlnx_i2s_trigger,
|
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.set_sysclk = xlnx_i2s_set_sysclk,
|
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.set_clkdiv = xlnx_i2s_set_sclkout_div,
|
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.startup = xlnx_i2s_startup,
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.hw_params = xlnx_i2s_hw_params
|
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};
|
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|
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@ -95,34 +169,33 @@ MODULE_DEVICE_TABLE(of, xlnx_i2s_of_match);
|
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|
||||
static int xlnx_i2s_probe(struct platform_device *pdev)
|
||||
{
|
||||
void __iomem *base;
|
||||
struct snd_soc_dai_driver *dai_drv;
|
||||
struct xlnx_i2s_drv_data *drv_data;
|
||||
int ret;
|
||||
u32 ch, format, data_width;
|
||||
u32 format;
|
||||
struct device *dev = &pdev->dev;
|
||||
struct device_node *node = dev->of_node;
|
||||
|
||||
dai_drv = devm_kzalloc(&pdev->dev, sizeof(*dai_drv), GFP_KERNEL);
|
||||
if (!dai_drv)
|
||||
drv_data = devm_kzalloc(&pdev->dev, sizeof(*drv_data), GFP_KERNEL);
|
||||
if (!drv_data)
|
||||
return -ENOMEM;
|
||||
|
||||
base = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (IS_ERR(base))
|
||||
return PTR_ERR(base);
|
||||
drv_data->base = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (IS_ERR(drv_data->base))
|
||||
return PTR_ERR(drv_data->base);
|
||||
|
||||
ret = of_property_read_u32(node, "xlnx,num-channels", &ch);
|
||||
ret = of_property_read_u32(node, "xlnx,num-channels", &drv_data->channels);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "cannot get supported channels\n");
|
||||
return ret;
|
||||
}
|
||||
ch = ch * 2;
|
||||
drv_data->channels *= 2;
|
||||
|
||||
ret = of_property_read_u32(node, "xlnx,dwidth", &data_width);
|
||||
ret = of_property_read_u32(node, "xlnx,dwidth", &drv_data->data_width);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "cannot get data width\n");
|
||||
return ret;
|
||||
}
|
||||
switch (data_width) {
|
||||
switch (drv_data->data_width) {
|
||||
case 16:
|
||||
format = SNDRV_PCM_FMTBIT_S16_LE;
|
||||
break;
|
||||
@ -134,35 +207,37 @@ static int xlnx_i2s_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
if (of_device_is_compatible(node, "xlnx,i2s-transmitter-1.0")) {
|
||||
dai_drv->name = "xlnx_i2s_playback";
|
||||
dai_drv->playback.stream_name = "Playback";
|
||||
dai_drv->playback.formats = format;
|
||||
dai_drv->playback.channels_min = ch;
|
||||
dai_drv->playback.channels_max = ch;
|
||||
dai_drv->playback.rates = SNDRV_PCM_RATE_8000_192000;
|
||||
dai_drv->ops = &xlnx_i2s_dai_ops;
|
||||
drv_data->dai_drv.name = "xlnx_i2s_playback";
|
||||
drv_data->dai_drv.playback.stream_name = "Playback";
|
||||
drv_data->dai_drv.playback.formats = format;
|
||||
drv_data->dai_drv.playback.channels_min = drv_data->channels;
|
||||
drv_data->dai_drv.playback.channels_max = drv_data->channels;
|
||||
drv_data->dai_drv.playback.rates = SNDRV_PCM_RATE_8000_192000;
|
||||
drv_data->dai_drv.ops = &xlnx_i2s_dai_ops;
|
||||
} else if (of_device_is_compatible(node, "xlnx,i2s-receiver-1.0")) {
|
||||
dai_drv->name = "xlnx_i2s_capture";
|
||||
dai_drv->capture.stream_name = "Capture";
|
||||
dai_drv->capture.formats = format;
|
||||
dai_drv->capture.channels_min = ch;
|
||||
dai_drv->capture.channels_max = ch;
|
||||
dai_drv->capture.rates = SNDRV_PCM_RATE_8000_192000;
|
||||
dai_drv->ops = &xlnx_i2s_dai_ops;
|
||||
drv_data->dai_drv.name = "xlnx_i2s_capture";
|
||||
drv_data->dai_drv.capture.stream_name = "Capture";
|
||||
drv_data->dai_drv.capture.formats = format;
|
||||
drv_data->dai_drv.capture.channels_min = drv_data->channels;
|
||||
drv_data->dai_drv.capture.channels_max = drv_data->channels;
|
||||
drv_data->dai_drv.capture.rates = SNDRV_PCM_RATE_8000_192000;
|
||||
drv_data->dai_drv.ops = &xlnx_i2s_dai_ops;
|
||||
} else {
|
||||
return -ENODEV;
|
||||
}
|
||||
drv_data->is_32bit_lrclk = readl(drv_data->base + I2S_CORE_CTRL_OFFSET) &
|
||||
I2S_CORE_CTRL_32BIT_LRCLK;
|
||||
|
||||
dev_set_drvdata(&pdev->dev, base);
|
||||
dev_set_drvdata(&pdev->dev, drv_data);
|
||||
|
||||
ret = devm_snd_soc_register_component(&pdev->dev, &xlnx_i2s_component,
|
||||
dai_drv, 1);
|
||||
&drv_data->dai_drv, 1);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "i2s component registration failed\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
dev_info(&pdev->dev, "%s DAI registered\n", dai_drv->name);
|
||||
dev_info(&pdev->dev, "%s DAI registered\n", drv_data->dai_drv.name);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user