clk: rockchip: add clock id for PCLK_EFUSE256 of RK3368 SoCs

Signed-off-by: Romain Perier <romain.perier@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Romain Perier 2017-09-04 10:51:16 +02:00 committed by Heiko Stuebner
parent 2bd6bf03f4
commit 8c04f7a3e3

View File

@ -156,6 +156,7 @@
#define PCLK_ISP 366
#define PCLK_VIP 367
#define PCLK_WDT 368
#define PCLK_EFUSE256 369
/* hclk gates */
#define HCLK_SFC 448