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Reset controller changes for v5.3

Browse Source 
This tag adds support for the Bitmain BM1880 reset controller to the
 reset-simple driver and fixes a spelling mistake in the i.MX7 reset
 controller binding document.
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Merge tag 'reset-for-v5.3' of git://git.pengutronix.de/git/pza/linux into arm/drivers

Reset controller changes for v5.3

This tag adds support for the Bitmain BM1880 reset controller to the
reset-simple driver and fixes a spelling mistake in the i.MX7 reset
controller binding document.

* tag 'reset-for-v5.3' of git://git.pengutronix.de/git/pza/linux:
  dt-bindings: reset: imx7: Fix the spelling of 'indices'
  reset: Add reset controller support for BM1880 SoC
  dt-bindings: reset: Add devicetree binding for BM1880 reset controller

Link: https://lore.kernel.org/r/1562236632.6641.14.camel@pengutronix.de
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2019-07-04 07:05:21 -07:00
commit 8c0993621c
5 changed files with 74 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt Normal file
View File

@ -0,0 +1,18 @@
Bitmain BM1880 SoC Reset Controller
===================================
Please also refer to reset.txt in this directory for common reset
controller binding usage.
Required properties:
- compatible: Should be "bitmain,bm1880-reset"
- reg: Offset and length of reset controller space in SCTRL.
- #reset-cells: Must be 1.
Example:
rst: reset-controller@c00 {
compatible = "bitmain,bm1880-reset";
reg = <0xc00 0x8>;
#reset-cells = <1>;
};

2
Documentation/devicetree/bindings/reset/fsl,imx7-src.txt
View File

@ -45,6 +45,6 @@ Example:
};
For list of all valid reset indicies see
For list of all valid reset indices see
<dt-bindings/reset/imx7-reset.h> for i.MX7 and
<dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ

3
drivers/reset/Kconfig
View File

@ -118,7 +118,7 @@ config RESET_QCOM_PDC
config RESET_SIMPLE
bool "Simple Reset Controller Driver" if COMPILE_TEST
default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED
default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED || ARCH_BITMAIN
help
This enables a simple reset controller driver for reset lines that
that can be asserted and deasserted by toggling bits in a contiguous,
@ -130,6 +130,7 @@ config RESET_SIMPLE
- RCC reset controller in STM32 MCUs
- Allwinner SoCs
- ZTE's zx2967 family
- Bitmain BM1880 SoC
config RESET_STM32MP157
bool "STM32MP157 Reset Driver" if COMPILE_TEST

2
drivers/reset/reset-simple.c
View File

@ -125,6 +125,8 @@ static const struct of_device_id reset_simple_dt_ids[] = {
.data = &reset_simple_active_low },
{ .compatible = "aspeed,ast2400-lpc-reset" },
{ .compatible = "aspeed,ast2500-lpc-reset" },
{ .compatible = "bitmain,bm1880-reset",
.data = &reset_simple_active_low },
{ /* sentinel */ },
};

51
include/dt-bindings/reset/bitmain,bm1880-reset.h Normal file
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@ -0,0 +1,51 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (c) 2018 Bitmain Ltd.
* Copyright (c) 2019 Linaro Ltd.
*/
#ifndef _DT_BINDINGS_BM1880_RESET_H
#define _DT_BINDINGS_BM1880_RESET_H
#define BM1880_RST_MAIN_AP 0
#define BM1880_RST_SECOND_AP 1
#define BM1880_RST_DDR 2
#define BM1880_RST_VIDEO 3
#define BM1880_RST_JPEG 4
#define BM1880_RST_VPP 5
#define BM1880_RST_GDMA 6
#define BM1880_RST_AXI_SRAM 7
#define BM1880_RST_TPU 8
#define BM1880_RST_USB 9
#define BM1880_RST_ETH0 10
#define BM1880_RST_ETH1 11
#define BM1880_RST_NAND 12
#define BM1880_RST_EMMC 13
#define BM1880_RST_SD 14
#define BM1880_RST_SDMA 15
#define BM1880_RST_I2S0 16
#define BM1880_RST_I2S1 17
#define BM1880_RST_UART0_1_CLK 18
#define BM1880_RST_UART0_1_ACLK 19
#define BM1880_RST_UART2_3_CLK 20
#define BM1880_RST_UART2_3_ACLK 21
#define BM1880_RST_MINER 22
#define BM1880_RST_I2C0 23
#define BM1880_RST_I2C1 24
#define BM1880_RST_I2C2 25
#define BM1880_RST_I2C3 26
#define BM1880_RST_I2C4 27
#define BM1880_RST_PWM0 28
#define BM1880_RST_PWM1 29
#define BM1880_RST_PWM2 30
#define BM1880_RST_PWM3 31
#define BM1880_RST_SPI 32
#define BM1880_RST_GPIO0 33
#define BM1880_RST_GPIO1 34
#define BM1880_RST_GPIO2 35
#define BM1880_RST_EFUSE 36
#define BM1880_RST_WDT 37
#define BM1880_RST_AHB_ROM 38
#define BM1880_RST_SPIC 39
#endif /* _DT_BINDINGS_BM1880_RESET_H */