KVM: arm64: Correct spelling of DBGDIDR register

The aarch32 debug ID register is called DBG*D*IDR (emphasis added), not
DBGIDR, use the correct spelling.

Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210128132823.35067-1-alexandru.elisei@arm.com
This commit is contained in:
Alexandru Elisei 2021-01-28 13:28:23 +00:00 committed by Marc Zyngier
parent 8e26d11f68
commit 8c358b29e0

View File

@ -1710,7 +1710,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
{ SYS_DESC(SYS_FPEXC32_EL2), NULL, reset_val, FPEXC32_EL2, 0x700 }, { SYS_DESC(SYS_FPEXC32_EL2), NULL, reset_val, FPEXC32_EL2, 0x700 },
}; };
static bool trap_dbgidr(struct kvm_vcpu *vcpu, static bool trap_dbgdidr(struct kvm_vcpu *vcpu,
struct sys_reg_params *p, struct sys_reg_params *p,
const struct sys_reg_desc *r) const struct sys_reg_desc *r)
{ {
@ -1757,8 +1757,8 @@ static bool trap_dbgidr(struct kvm_vcpu *vcpu,
* guest. Revisit this one day, would this principle change. * guest. Revisit this one day, would this principle change.
*/ */
static const struct sys_reg_desc cp14_regs[] = { static const struct sys_reg_desc cp14_regs[] = {
/* DBGIDR */ /* DBGDIDR */
{ Op1( 0), CRn( 0), CRm( 0), Op2( 0), trap_dbgidr }, { Op1( 0), CRn( 0), CRm( 0), Op2( 0), trap_dbgdidr },
/* DBGDTRRXext */ /* DBGDTRRXext */
{ Op1( 0), CRn( 0), CRm( 0), Op2( 2), trap_raz_wi }, { Op1( 0), CRn( 0), CRm( 0), Op2( 2), trap_raz_wi },