habanalabs: don't send addr and size to scrub_device_mem cb
We use scrub_device_mem only to scrub the entire SRAM and entire DRAM. Therefore there is no need to send addr and size args to the callback. Signed-off-by: Dafna Hirschfeld <dhirschfeld@habana.ai> Reviewed-by: Oded Gabbay <ogabbay@kernel.org> Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
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c1048d14c0
commit
8c834a1442
drivers/misc/habanalabs
@ -108,7 +108,7 @@ static void hl_ctx_fini(struct hl_ctx *ctx)
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hl_encaps_sig_mgr_fini(hdev, &ctx->sig_mgr);
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/* Scrub both SRAM and DRAM */
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hdev->asic_funcs->scrub_device_mem(hdev, 0, 0);
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hdev->asic_funcs->scrub_device_mem(hdev);
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} else {
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dev_dbg(hdev->dev, "closing kernel context\n");
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hdev->asic_funcs->ctx_fini(ctx);
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@ -1248,7 +1248,7 @@ struct fw_load_mgr {
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* dma_free_coherent(). This is ASIC function because
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* its implementation is not trivial when the driver
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* is loaded in simulation mode (not upstreamed).
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* @scrub_device_mem: Scrub device memory given an address and size
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* @scrub_device_mem: Scrub the entire SRAM and DRAM.
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* @scrub_device_dram: Scrub the dram memory of the device.
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* @get_int_queue_base: get the internal queue base address.
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* @test_queues: run simple test on all queues for sanity check.
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@ -1359,7 +1359,7 @@ struct hl_asic_funcs {
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dma_addr_t *dma_handle, gfp_t flag);
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void (*asic_dma_free_coherent)(struct hl_device *hdev, size_t size,
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void *cpu_addr, dma_addr_t dma_handle);
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int (*scrub_device_mem)(struct hl_device *hdev, u64 addr, u64 size);
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int (*scrub_device_mem)(struct hl_device *hdev);
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int (*scrub_device_dram)(struct hl_device *hdev, u64 val);
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void* (*get_int_queue_base)(struct hl_device *hdev, u32 queue_id,
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dma_addr_t *dma_handle, u16 *queue_len);
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@ -1657,7 +1657,7 @@ static int gaudi_late_init(struct hl_device *hdev)
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}
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/* Scrub both SRAM and DRAM */
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rc = hdev->asic_funcs->scrub_device_mem(hdev, 0, 0);
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rc = hdev->asic_funcs->scrub_device_mem(hdev);
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if (rc)
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goto disable_pci_access;
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@ -4846,51 +4846,49 @@ static int gaudi_scrub_device_dram(struct hl_device *hdev, u64 val)
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return 0;
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}
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static int gaudi_scrub_device_mem(struct hl_device *hdev, u64 addr, u64 size)
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static int gaudi_scrub_device_mem(struct hl_device *hdev)
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{
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struct asic_fixed_properties *prop = &hdev->asic_prop;
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u64 addr, size, dummy_val;
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int rc = 0;
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u64 val = 0;
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if (!hdev->memory_scrub)
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return 0;
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if (!addr && !size) {
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/* Wait till device is idle */
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rc = hl_poll_timeout(
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hdev,
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mmDMA0_CORE_STS0/* dummy */,
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val/* dummy */,
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(hdev->asic_funcs->is_device_idle(hdev, NULL,
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0, NULL)),
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1000,
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HBM_SCRUBBING_TIMEOUT_US);
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if (rc) {
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dev_err(hdev->dev, "waiting for idle timeout\n");
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return -EIO;
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}
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/* Scrub SRAM */
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addr = prop->sram_user_base_address;
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size = hdev->pldm ? 0x10000 :
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(prop->sram_size - SRAM_USER_BASE_OFFSET);
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val = 0x7777777777777777ull;
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rc = gaudi_memset_device_memory(hdev, addr, size, val);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to clear SRAM in mem scrub all\n");
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return rc;
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}
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/* Scrub HBM using all DMA channels in parallel */
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rc = gaudi_scrub_device_dram(hdev, 0xdeadbeaf);
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if (rc)
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dev_err(hdev->dev,
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"Failed to clear HBM in mem scrub all\n");
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/* Wait till device is idle */
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rc = hl_poll_timeout(hdev,
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mmDMA0_CORE_STS0 /* dummy */,
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dummy_val /* dummy */,
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(hdev->asic_funcs->is_device_idle(hdev, NULL, 0, NULL)),
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1000,
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HBM_SCRUBBING_TIMEOUT_US);
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if (rc) {
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dev_err(hdev->dev, "waiting for idle timeout\n");
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return -EIO;
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}
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return rc;
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/* Scrub SRAM */
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addr = prop->sram_user_base_address;
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size = hdev->pldm ? 0x10000 : prop->sram_size - SRAM_USER_BASE_OFFSET;
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val = 0x7777777777777777ull;
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dev_dbg(hdev->dev, "Scrubing SRAM: 0x%09llx - 0x%09llx val: 0x%llx\n",
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addr, addr + size, val);
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rc = gaudi_memset_device_memory(hdev, addr, size, val);
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if (rc) {
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dev_err(hdev->dev, "Failed to clear SRAM (%d)\n", rc);
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return rc;
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}
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/* Scrub HBM using all DMA channels in parallel */
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rc = gaudi_scrub_device_dram(hdev, 0xdeadbeaf);
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if (rc) {
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dev_err(hdev->dev, "Failed to clear HBM (%d)\n", rc);
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return rc;
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}
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return 0;
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}
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static void *gaudi_get_int_queue_base(struct hl_device *hdev,
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@ -3019,7 +3019,7 @@ static void goya_dma_free_coherent(struct hl_device *hdev, size_t size,
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dma_free_coherent(&hdev->pdev->dev, size, cpu_addr, fixed_dma_handle);
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}
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int goya_scrub_device_mem(struct hl_device *hdev, u64 addr, u64 size)
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int goya_scrub_device_mem(struct hl_device *hdev)
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{
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return 0;
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}
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@ -233,7 +233,7 @@ void goya_add_end_of_cb_packets(struct hl_device *hdev, void *kernel_address,
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u32 len, u32 original_len, u64 cq_addr, u32 cq_val,
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u32 msix_vec, bool eb);
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int goya_cs_parser(struct hl_device *hdev, struct hl_cs_parser *parser);
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int goya_scrub_device_mem(struct hl_device *hdev, u64 addr, u64 size);
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int goya_scrub_device_mem(struct hl_device *hdev);
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void *goya_get_int_queue_base(struct hl_device *hdev, u32 queue_id,
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dma_addr_t *dma_handle, u16 *queue_len);
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u32 goya_get_dma_desc_list_size(struct hl_device *hdev, struct sg_table *sgt);
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