LoongArch: Add JUMP_VIRT_ADDR macro implementation to avoid using la.abs
Add JUMP_VIRT_ADDR macro implementation to avoid using la.abs directly. This is a preparation for subsequent patches. Signed-off-by: Youling Tang <tangyouling@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
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@ -7,6 +7,7 @@
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#include <linux/threads.h>
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#include <asm/addrspace.h>
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#include <asm/asm.h>
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#include <asm/asmmacro.h>
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#include <asm/asm-offsets.h>
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@ -36,6 +37,14 @@
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cfi_restore \reg \offset \docfi
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.endm
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/* Jump to the runtime virtual address. */
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.macro JUMP_VIRT_ADDR temp1 temp2
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li.d \temp1, CACHE_BASE
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pcaddi \temp2, 0
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or \temp1, \temp1, \temp2
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jirl zero, \temp1, 0xc
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.endm
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.macro BACKUP_T0T1
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csrwr t0, EXCEPTION_KS0
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csrwr t1, EXCEPTION_KS1
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@ -50,11 +50,8 @@ SYM_CODE_START(kernel_entry) # kernel entry point
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li.d t0, CSR_DMW1_INIT # CA, PLV0, 0x9000 xxxx xxxx xxxx
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csrwr t0, LOONGARCH_CSR_DMWIN1
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/* We might not get launched at the address the kernel is linked to,
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so we jump there. */
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la.abs t0, 0f
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jr t0
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0:
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JUMP_VIRT_ADDR t0, t1
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/* Enable PG */
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li.w t0, 0xb0 # PLV=0, IE=0, PG=1
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csrwr t0, LOONGARCH_CSR_CRMD
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@ -106,9 +103,8 @@ SYM_CODE_START(smpboot_entry)
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li.d t0, CSR_DMW1_INIT # CA, PLV0
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csrwr t0, LOONGARCH_CSR_DMWIN1
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la.abs t0, 0f
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jr t0
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0:
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JUMP_VIRT_ADDR t0, t1
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/* Enable PG */
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li.w t0, 0xb0 # PLV=0, IE=0, PG=1
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csrwr t0, LOONGARCH_CSR_CRMD
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@ -78,9 +78,8 @@ SYM_INNER_LABEL(loongarch_wakeup_start, SYM_L_GLOBAL)
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li.d t0, CSR_DMW1_INIT # CA, PLV0
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csrwr t0, LOONGARCH_CSR_DMWIN1
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la.abs t0, 0f
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jr t0
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0:
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JUMP_VIRT_ADDR t0, t1
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la.pcrel t0, acpi_saved_sp
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ld.d sp, t0, 0
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SETUP_WAKEUP
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