i40e: Initialize hardware capabilities at single place
Some i40e_hw.caps bits are set in i40e_set_hw_caps(), some of them in i40e_init_adminq() and the rest of them in i40e_sw_init(). Consolidate the initialization to single proper place i40e_set_hw_caps(). Signed-off-by: Ivan Vecera <ivecera@redhat.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel) Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Link: https://lore.kernel.org/r/20231113231047.548659-10-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@ -522,10 +522,52 @@ static void i40e_set_hw_caps(struct i40e_hw *hw)
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/* The ability to RX (not drop) 802.1ad frames */
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set_bit(I40E_HW_CAP_802_1AD, hw->caps);
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}
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if ((aq->api_maj_ver == 1 && aq->api_min_ver > 4) ||
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aq->api_maj_ver > 1) {
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/* Supported in FW API version higher than 1.4 */
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set_bit(I40E_HW_CAP_GENEVE_OFFLOAD, hw->caps);
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}
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if ((aq->fw_maj_ver == 4 && aq->fw_min_ver < 33) ||
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aq->fw_maj_ver < 4) {
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set_bit(I40E_HW_CAP_RESTART_AUTONEG, hw->caps);
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/* No DCB support for FW < v4.33 */
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set_bit(I40E_HW_CAP_NO_DCB_SUPPORT, hw->caps);
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}
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if ((aq->fw_maj_ver == 4 && aq->fw_min_ver < 3) ||
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aq->fw_maj_ver < 4) {
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/* Disable FW LLDP if FW < v4.3 */
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set_bit(I40E_HW_CAP_STOP_FW_LLDP, hw->caps);
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}
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if ((aq->fw_maj_ver == 4 && aq->fw_min_ver >= 40) ||
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aq->fw_maj_ver >= 5) {
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/* Use the FW Set LLDP MIB API if FW > v4.40 */
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set_bit(I40E_HW_CAP_USE_SET_LLDP_MIB, hw->caps);
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}
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if (aq->fw_maj_ver >= 6) {
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/* Enable PTP L4 if FW > v6.0 */
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set_bit(I40E_HW_CAP_PTP_L4, hw->caps);
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}
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break;
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case I40E_MAC_X722:
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set_bit(I40E_HW_CAP_AQ_SRCTL_ACCESS_ENABLE, hw->caps);
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set_bit(I40E_HW_CAP_NVM_READ_REQUIRES_LOCK, hw->caps);
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set_bit(I40E_HW_CAP_RSS_AQ, hw->caps);
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set_bit(I40E_HW_CAP_128_QP_RSS, hw->caps);
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set_bit(I40E_HW_CAP_ATR_EVICT, hw->caps);
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set_bit(I40E_HW_CAP_WB_ON_ITR, hw->caps);
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set_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE, hw->caps);
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set_bit(I40E_HW_CAP_NO_PCI_LINK_CHECK, hw->caps);
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set_bit(I40E_HW_CAP_USE_SET_LLDP_MIB, hw->caps);
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set_bit(I40E_HW_CAP_GENEVE_OFFLOAD, hw->caps);
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set_bit(I40E_HW_CAP_PTP_L4, hw->caps);
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set_bit(I40E_HW_CAP_WOL_MC_MAGIC_PKT_WAKE, hw->caps);
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set_bit(I40E_HW_CAP_OUTER_UDP_CSUM, hw->caps);
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if (rd32(hw, I40E_GLQF_FDEVICTENA(1)) !=
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I40E_FDEVICT_PCTYPE_DEFAULT) {
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hw_warn(hw, "FD EVICT PCTYPES are not right, disable FD HW EVICT\n");
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clear_bit(I40E_HW_CAP_ATR_EVICT, hw->caps);
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}
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if (aq->api_maj_ver > 1 ||
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(aq->api_maj_ver == 1 &&
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@ -553,6 +595,12 @@ static void i40e_set_hw_caps(struct i40e_hw *hw)
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aq->api_min_ver >= 5))
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set_bit(I40E_HW_CAP_NVM_READ_REQUIRES_LOCK, hw->caps);
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/* The ability to RX (not drop) 802.1ad frames was added in API 1.7 */
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if (aq->api_maj_ver > 1 ||
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(aq->api_maj_ver == 1 &&
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aq->api_min_ver >= 7))
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set_bit(I40E_HW_CAP_802_1AD, hw->caps);
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if (aq->api_maj_ver > 1 ||
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(aq->api_maj_ver == 1 &&
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aq->api_min_ver >= 8))
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@ -646,24 +694,6 @@ int i40e_init_adminq(struct i40e_hw *hw)
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&oem_lo);
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hw->nvm.oem_ver = ((u32)oem_hi << 16) | oem_lo;
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if (hw->mac.type == I40E_MAC_XL710 &&
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hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
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hw->aq.api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_XL710) {
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set_bit(I40E_HW_CAP_AQ_PHY_ACCESS, hw->caps);
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set_bit(I40E_HW_CAP_FW_LLDP_STOPPABLE, hw->caps);
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}
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if (hw->mac.type == I40E_MAC_X722 &&
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hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
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hw->aq.api_min_ver >= I40E_MINOR_VER_FW_LLDP_STOPPABLE_X722) {
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set_bit(I40E_HW_CAP_FW_LLDP_STOPPABLE, hw->caps);
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}
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/* The ability to RX (not drop) 802.1ad frames was added in API 1.7 */
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if (hw->aq.api_maj_ver > 1 ||
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(hw->aq.api_maj_ver == 1 &&
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hw->aq.api_min_ver >= 7))
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set_bit(I40E_HW_CAP_802_1AD, hw->caps);
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if (hw->aq.api_maj_ver > I40E_FW_API_VERSION_MAJOR) {
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ret_code = -EIO;
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goto init_adminq_free_arq;
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@ -37,6 +37,7 @@ struct i40e_hw;
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struct device *i40e_hw_to_dev(struct i40e_hw *hw);
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#define hw_dbg(hw, S, A...) dev_dbg(i40e_hw_to_dev(hw), S, ##A)
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#define hw_warn(hw, S, A...) dev_warn(i40e_hw_to_dev(hw), S, ##A)
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#define i40e_debug(h, m, s, ...) \
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do { \
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@ -12782,62 +12782,10 @@ static int i40e_sw_init(struct i40e_pf *pf)
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pf->hw.func_caps.fd_filters_best_effort;
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}
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if (pf->hw.mac.type == I40E_MAC_X722) {
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set_bit(I40E_HW_CAP_RSS_AQ, pf->hw.caps);
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set_bit(I40E_HW_CAP_128_QP_RSS, pf->hw.caps);
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set_bit(I40E_HW_CAP_ATR_EVICT, pf->hw.caps);
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set_bit(I40E_HW_CAP_WB_ON_ITR, pf->hw.caps);
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set_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE, pf->hw.caps);
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set_bit(I40E_HW_CAP_NO_PCI_LINK_CHECK, pf->hw.caps);
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set_bit(I40E_HW_CAP_USE_SET_LLDP_MIB, pf->hw.caps);
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set_bit(I40E_HW_CAP_GENEVE_OFFLOAD, pf->hw.caps);
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set_bit(I40E_HW_CAP_PTP_L4, pf->hw.caps);
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set_bit(I40E_HW_CAP_WOL_MC_MAGIC_PKT_WAKE, pf->hw.caps);
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set_bit(I40E_HW_CAP_OUTER_UDP_CSUM, pf->hw.caps);
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#define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03
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if (rd32(&pf->hw, I40E_GLQF_FDEVICTENA(1)) !=
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I40E_FDEVICT_PCTYPE_DEFAULT) {
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dev_warn(&pf->pdev->dev,
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"FD EVICT PCTYPES are not right, disable FD HW EVICT\n");
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clear_bit(I40E_HW_CAP_ATR_EVICT, pf->hw.caps);
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}
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} else if ((pf->hw.aq.api_maj_ver > 1) ||
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((pf->hw.aq.api_maj_ver == 1) &&
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(pf->hw.aq.api_min_ver > 4))) {
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/* Supported in FW API version higher than 1.4 */
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set_bit(I40E_HW_CAP_GENEVE_OFFLOAD, pf->hw.caps);
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}
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/* Enable HW ATR eviction if possible */
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if (test_bit(I40E_HW_CAP_ATR_EVICT, pf->hw.caps))
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set_bit(I40E_FLAG_HW_ATR_EVICT_ENA, pf->flags);
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if ((pf->hw.mac.type == I40E_MAC_XL710) &&
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(((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
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(pf->hw.aq.fw_maj_ver < 4))) {
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set_bit(I40E_HW_CAP_RESTART_AUTONEG, pf->hw.caps);
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/* No DCB support for FW < v4.33 */
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set_bit(I40E_HW_CAP_NO_DCB_SUPPORT, pf->hw.caps);
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}
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/* Disable FW LLDP if FW < v4.3 */
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if ((pf->hw.mac.type == I40E_MAC_XL710) &&
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(((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
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(pf->hw.aq.fw_maj_ver < 4)))
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set_bit(I40E_HW_CAP_STOP_FW_LLDP, pf->hw.caps);
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/* Use the FW Set LLDP MIB API if FW > v4.40 */
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if ((pf->hw.mac.type == I40E_MAC_XL710) &&
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(((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
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(pf->hw.aq.fw_maj_ver >= 5)))
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set_bit(I40E_HW_CAP_USE_SET_LLDP_MIB, pf->hw.caps);
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/* Enable PTP L4 if FW > v6.0 */
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if (pf->hw.mac.type == I40E_MAC_XL710 &&
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pf->hw.aq.fw_maj_ver >= 6)
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set_bit(I40E_HW_CAP_PTP_L4, pf->hw.caps);
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if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) {
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pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
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set_bit(I40E_FLAG_VMDQ_ENA, pf->flags);
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@ -12855,8 +12803,7 @@ static int i40e_sw_init(struct i40e_pf *pf)
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* if NPAR is functioning so unset this hw flag in this case.
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*/
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if (pf->hw.mac.type == I40E_MAC_XL710 &&
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pf->hw.func_caps.npar_enable &&
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test_bit(I40E_HW_CAP_FW_LLDP_STOPPABLE, pf->hw.caps))
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pf->hw.func_caps.npar_enable)
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clear_bit(I40E_HW_CAP_FW_LLDP_STOPPABLE, pf->hw.caps);
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#ifdef CONFIG_PCI_IOV
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@ -899,6 +899,7 @@
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#define I40E_GLQF_ORT_FLX_PAYLOAD_SHIFT 7
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#define I40E_GLQF_ORT_FLX_PAYLOAD_MASK I40E_MASK(0x1, I40E_GLQF_ORT_FLX_PAYLOAD_SHIFT)
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#define I40E_GLQF_FDEVICTENA(_i) (0x00270384 + ((_i) * 4)) /* _i=0...1 */ /* Reset: CORER */
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#define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03
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/* Redefined for X722 family */
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#define I40E_GLGEN_STAT_CLEAR 0x00390004 /* Reset: CORER */
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#endif /* _I40E_REGISTER_H_ */
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