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Move to use module_platform_probe and enable usage

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of Coresight-related clocks on rk3399.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmFRel0QHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgRZkCACluvNcUHR0VvD9yF50WGdSAIMRRhQWeEIW
 /VsTO8H8z13QiaSI8XR8wb710JHdlnpGhPCSUInY4AQsyVt4uP292cW8P5R9QjT8
 u9DQIIkb5pNJYIl05OR86qRQUO7uP2EWqcP9ta+QL7SZBDgsAtJO8NpcealYj7NI
 cC52UQ63XxQeCSTrvh+Vmw6n0cRqUOdwjPF9fuIPFMXdzt+tqTaA0H7PP46mLcvM
 Z+QSTG1ESvNOdTkMAvj3yG/9cI1z5XJhFSw+B3TRfIFdLiJez7mFZFEycmiXNPnU
 dKrsYpJjZ5WWJriTpcy1Y68ZMJ3L4bYecrZSV4OpixWTgQ6QGgux
 =OEOz
 -----END PGP SIGNATURE-----

Merge tag 'v5.16-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip

Pull Rockchip clk driver updates from Heiko Stuebner:

 - Move to use module_platform_probe
 - Enable usage of Coresight-related clocks on rk3399

* tag 'v5.16-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: use module_platform_driver_probe
  clk: rockchip: rk3399: expose PCLK_COREDBG_{B,L}
  clk: rockchip: rk3399: make CPU clocks critical
This commit is contained in:
Stephen Boyd 2021-09-28 15:21:01 -07:00
commit 8d27b14775
2 changed files with 11 additions and 8 deletions
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17
drivers/clk/rockchip/clk-rk3399.c
View File

@ -481,7 +481,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
COMPOSITE_NOMUX(0, "atclk_core_l", "armclkl", CLK_IGNORE_UNUSED,
RK3399_CLKSEL_CON(1), 0, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
RK3399_CLKGATE_CON(0), 5, GFLAGS),
COMPOSITE_NOMUX(0, "pclk_dbg_core_l", "armclkl", CLK_IGNORE_UNUSED,
COMPOSITE_NOMUX(PCLK_COREDBG_L, "pclk_dbg_core_l", "armclkl", CLK_IGNORE_UNUSED,
RK3399_CLKSEL_CON(1), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
RK3399_CLKGATE_CON(0), 6, GFLAGS),
@ -531,7 +531,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
GATE(ACLK_GIC_ADB400_CORE_B_2_GIC, "aclk_core_adb400_core_b_2_gic", "armclkb", CLK_IGNORE_UNUSED,
RK3399_CLKGATE_CON(14), 4, GFLAGS),
DIV(0, "pclken_dbg_core_b", "pclk_dbg_core_b", CLK_IGNORE_UNUSED,
DIV(PCLK_COREDBG_B, "pclken_dbg_core_b", "pclk_dbg_core_b", CLK_IGNORE_UNUSED,
RK3399_CLKSEL_CON(3), 13, 2, DFLAGS | CLK_DIVIDER_READ_ONLY),
GATE(0, "pclk_dbg_cxcs_pd_core_b", "pclk_dbg_core_b", CLK_IGNORE_UNUSED,
@ -1514,7 +1514,10 @@ static const char *const rk3399_cru_critical_clocks[] __initconst = {
"aclk_vio_noc",
/* ddrc */
"sclk_ddrc"
"sclk_ddrc",
"armclkl",
"armclkb",
};
static const char *const rk3399_pmucru_critical_clocks[] __initconst = {
@ -1549,9 +1552,6 @@ static void __init rk3399_clk_init(struct device_node *np)
rockchip_clk_register_branches(ctx, rk3399_clk_branches,
ARRAY_SIZE(rk3399_clk_branches));
rockchip_clk_protect_critical(rk3399_cru_critical_clocks,
ARRAY_SIZE(rk3399_cru_critical_clocks));
rockchip_clk_register_armclk(ctx, ARMCLKL, "armclkl",
mux_armclkl_p, ARRAY_SIZE(mux_armclkl_p),
&rk3399_cpuclkl_data, rk3399_cpuclkl_rates,
@ -1562,6 +1562,9 @@ static void __init rk3399_clk_init(struct device_node *np)
&rk3399_cpuclkb_data, rk3399_cpuclkb_rates,
ARRAY_SIZE(rk3399_cpuclkb_rates));
rockchip_clk_protect_critical(rk3399_cru_critical_clocks,
ARRAY_SIZE(rk3399_cru_critical_clocks));
rockchip_register_softrst(np, 21, reg_base + RK3399_SOFTRST_CON(0),
ROCKCHIP_SOFTRST_HIWORD_MASK);
@ -1653,7 +1656,7 @@ static struct platform_driver clk_rk3399_driver = {
.suppress_bind_attrs = true,
},
};
builtin_platform_driver_probe(clk_rk3399_driver, clk_rk3399_probe);
module_platform_driver_probe(clk_rk3399_driver, clk_rk3399_probe);
MODULE_DESCRIPTION("Rockchip RK3399 Clock Driver");
MODULE_LICENSE("GPL");

2
drivers/clk/rockchip/clk-rk3568.c
View File

@ -1719,7 +1719,7 @@ static struct platform_driver clk_rk3568_driver = {
.suppress_bind_attrs = true,
},
};
builtin_platform_driver_probe(clk_rk3568_driver, clk_rk3568_probe);
module_platform_driver_probe(clk_rk3568_driver, clk_rk3568_probe);
MODULE_DESCRIPTION("Rockchip RK3568 Clock Driver");
MODULE_LICENSE("GPL");