ARM: tegra: don't pass CPU ID to tegra_{set,clear}_cpu_in_lp2
tegra_{set,clear}_cpu_in_lp2 can easily determine which CPU ID they are running on; there is no need to pass the CPU ID into those functions. So, remove their CPU ID function parameter. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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@ -177,7 +177,6 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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u32 cpu = is_smp() ? cpu_logical_map(dev->cpu) : dev->cpu;
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bool entered_lp2 = false;
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if (tegra_pending_sgi())
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@ -193,16 +192,16 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev,
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local_fiq_disable();
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tegra_set_cpu_in_lp2(cpu);
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tegra_set_cpu_in_lp2();
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cpu_pm_enter();
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if (cpu == 0)
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if (dev->cpu == 0)
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entered_lp2 = tegra20_cpu_cluster_power_down(dev, drv, index);
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else
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entered_lp2 = tegra20_idle_enter_lp2_cpu_1(dev, drv, index);
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cpu_pm_exit();
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tegra_clear_cpu_in_lp2(cpu);
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tegra_clear_cpu_in_lp2();
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local_fiq_enable();
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@ -114,16 +114,15 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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u32 cpu = is_smp() ? cpu_logical_map(dev->cpu) : dev->cpu;
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bool entered_lp2 = false;
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bool last_cpu;
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local_fiq_disable();
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last_cpu = tegra_set_cpu_in_lp2(cpu);
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last_cpu = tegra_set_cpu_in_lp2();
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cpu_pm_enter();
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if (cpu == 0) {
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if (dev->cpu == 0) {
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if (last_cpu)
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entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv,
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index);
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@ -134,7 +133,7 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev,
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}
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cpu_pm_exit();
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tegra_clear_cpu_in_lp2(cpu);
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tegra_clear_cpu_in_lp2();
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local_fiq_enable();
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@ -105,8 +105,9 @@ static void suspend_cpu_complex(void)
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flowctrl_cpu_suspend_enter(cpu);
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}
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void tegra_clear_cpu_in_lp2(int phy_cpu_id)
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void tegra_clear_cpu_in_lp2(void)
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{
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int phy_cpu_id = cpu_logical_map(smp_processor_id());
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u32 *cpu_in_lp2 = tegra_cpu_lp2_mask;
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spin_lock(&tegra_lp2_lock);
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@ -117,8 +118,9 @@ void tegra_clear_cpu_in_lp2(int phy_cpu_id)
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spin_unlock(&tegra_lp2_lock);
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}
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bool tegra_set_cpu_in_lp2(int phy_cpu_id)
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bool tegra_set_cpu_in_lp2(void)
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{
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int phy_cpu_id = cpu_logical_map(smp_processor_id());
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bool last_cpu = false;
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cpumask_t *cpu_lp2_mask = tegra_cpu_lp2_mask;
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u32 *cpu_in_lp2 = tegra_cpu_lp2_mask;
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@ -206,7 +208,7 @@ static int __cpuinit tegra_suspend_enter(suspend_state_t state)
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suspend_cpu_complex();
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switch (mode) {
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case TEGRA_SUSPEND_LP2:
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tegra_set_cpu_in_lp2(0);
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tegra_set_cpu_in_lp2();
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break;
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default:
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break;
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@ -216,7 +218,7 @@ static int __cpuinit tegra_suspend_enter(suspend_state_t state)
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switch (mode) {
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case TEGRA_SUSPEND_LP2:
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tegra_clear_cpu_in_lp2(0);
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tegra_clear_cpu_in_lp2();
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break;
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default:
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break;
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@ -28,8 +28,8 @@ extern unsigned long l2x0_saved_regs_addr;
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void save_cpu_arch_register(void);
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void restore_cpu_arch_register(void);
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void tegra_clear_cpu_in_lp2(int phy_cpu_id);
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bool tegra_set_cpu_in_lp2(int phy_cpu_id);
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void tegra_clear_cpu_in_lp2(void);
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bool tegra_set_cpu_in_lp2(void);
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void tegra_idle_lp2_last(void);
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extern void (*tegra_tear_down_cpu)(void);
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