Merge branch 'for-3.2' into for-3.3
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commit
8f9aa2526b
@ -76,6 +76,8 @@ struct sta32x_priv {
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unsigned int mclk;
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unsigned int format;
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u32 coef_shadow[STA32X_COEF_COUNT];
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};
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static const DECLARE_TLV_DB_SCALE(mvol_tlv, -12700, 50, 1);
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@ -227,6 +229,7 @@ static int sta32x_coefficient_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
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struct sta32x_priv *sta32x = snd_soc_codec_get_drvdata(codec);
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int numcoef = kcontrol->private_value >> 16;
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int index = kcontrol->private_value & 0xffff;
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unsigned int cfud;
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@ -239,6 +242,11 @@ static int sta32x_coefficient_put(struct snd_kcontrol *kcontrol,
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snd_soc_write(codec, STA32X_CFUD, cfud);
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snd_soc_write(codec, STA32X_CFADDR2, index);
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for (i = 0; i < numcoef && (index + i < STA32X_COEF_COUNT); i++)
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sta32x->coef_shadow[index + i] =
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(ucontrol->value.bytes.data[3 * i] << 16)
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| (ucontrol->value.bytes.data[3 * i + 1] << 8)
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| (ucontrol->value.bytes.data[3 * i + 2]);
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for (i = 0; i < 3 * numcoef; i++)
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snd_soc_write(codec, STA32X_B1CF1 + i,
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ucontrol->value.bytes.data[i]);
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@ -252,6 +260,48 @@ static int sta32x_coefficient_put(struct snd_kcontrol *kcontrol,
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return 0;
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}
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int sta32x_sync_coef_shadow(struct snd_soc_codec *codec)
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{
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struct sta32x_priv *sta32x = snd_soc_codec_get_drvdata(codec);
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unsigned int cfud;
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int i;
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/* preserve reserved bits in STA32X_CFUD */
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cfud = snd_soc_read(codec, STA32X_CFUD) & 0xf0;
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for (i = 0; i < STA32X_COEF_COUNT; i++) {
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snd_soc_write(codec, STA32X_CFADDR2, i);
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snd_soc_write(codec, STA32X_B1CF1,
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(sta32x->coef_shadow[i] >> 16) & 0xff);
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snd_soc_write(codec, STA32X_B1CF2,
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(sta32x->coef_shadow[i] >> 8) & 0xff);
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snd_soc_write(codec, STA32X_B1CF3,
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(sta32x->coef_shadow[i]) & 0xff);
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/* chip documentation does not say if the bits are
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* self-clearing, so do it explicitly */
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snd_soc_write(codec, STA32X_CFUD, cfud);
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snd_soc_write(codec, STA32X_CFUD, cfud | 0x01);
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}
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return 0;
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}
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int sta32x_cache_sync(struct snd_soc_codec *codec)
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{
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unsigned int mute;
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int rc;
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if (!codec->cache_sync)
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return 0;
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/* mute during register sync */
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mute = snd_soc_read(codec, STA32X_MMUTE);
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snd_soc_write(codec, STA32X_MMUTE, mute | STA32X_MMUTE_MMUTE);
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sta32x_sync_coef_shadow(codec);
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rc = snd_soc_cache_sync(codec);
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snd_soc_write(codec, STA32X_MMUTE, mute);
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return rc;
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}
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#define SINGLE_COEF(xname, index) \
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{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
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.info = sta32x_coefficient_info, \
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@ -661,7 +711,7 @@ static int sta32x_set_bias_level(struct snd_soc_codec *codec,
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return ret;
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}
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snd_soc_cache_sync(codec);
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sta32x_cache_sync(codec);
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}
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/* Power up to mute */
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@ -790,6 +840,17 @@ static int sta32x_probe(struct snd_soc_codec *codec)
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STA32X_CxCFG_OM_MASK,
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2 << STA32X_CxCFG_OM_SHIFT);
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/* initialize coefficient shadow RAM with reset values */
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for (i = 4; i <= 49; i += 5)
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sta32x->coef_shadow[i] = 0x400000;
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for (i = 50; i <= 54; i++)
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sta32x->coef_shadow[i] = 0x7fffff;
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sta32x->coef_shadow[55] = 0x5a9df7;
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sta32x->coef_shadow[56] = 0x7fffff;
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sta32x->coef_shadow[59] = 0x7fffff;
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sta32x->coef_shadow[60] = 0x400000;
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sta32x->coef_shadow[61] = 0x400000;
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sta32x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
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/* Bias level configuration will have done an extra enable */
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regulator_bulk_disable(ARRAY_SIZE(sta32x->supplies), sta32x->supplies);
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@ -19,6 +19,7 @@
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/* STA326 register addresses */
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#define STA32X_REGISTER_COUNT 0x2d
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#define STA32X_COEF_COUNT 62
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#define STA32X_CONFA 0x00
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#define STA32X_CONFB 0x01
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