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soc: sifive: ccache: fix missing of_node_put() in sifive_ccache_init()

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The device_node pointer returned by of_find_matching_node() with
refcount incremented, when finish using it, the refcount need be
decreased.

Fixes: a967a289f169 ("RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
Yang Yingliang 2022-10-18 10:31:49 +08:00 committed by Conor Dooley
parent 756344e7cb
commit 8fbf94fea0
1 changed files with 11 additions and 4 deletions
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15
drivers/soc/sifive/sifive_ccache.c
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@ -215,12 +215,16 @@ static int __init sifive_ccache_init(void)
if (!np)
return -ENODEV;
if (of_address_to_resource(np, 0, &res))
return -ENODEV;
if (of_address_to_resource(np, 0, &res)) {
rc = -ENODEV;
goto err_node_put;
}
ccache_base = ioremap(res.start, resource_size(&res));
if (!ccache_base)
return -ENOMEM;
if (!ccache_base) {
rc = -ENOMEM;
goto err_node_put;
}
if (of_property_read_u32(np, "cache-level", &level)) {
rc = -ENOENT;
@ -243,6 +247,7 @@ static int __init sifive_ccache_init(void)
goto err_free_irq;
}
}
of_node_put(np);
ccache_config_read();
@ -259,6 +264,8 @@ err_free_irq:
free_irq(g_irq[i], NULL);
err_unmap:
iounmap(ccache_base);
err_node_put:
of_node_put(np);
return rc;
}