ARM: DRA7: hwmod: Add reset data for PCIe
Add PCIe reset data to PCIe hwmods on DRA7x. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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@ -1531,29 +1531,44 @@ static struct omap_hwmod_class dra7xx_pciess_hwmod_class = {
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};
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/* pcie1 */
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static struct omap_hwmod_rst_info dra7xx_pciess1_resets[] = {
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{ .name = "pcie", .rst_shift = 0 },
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};
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static struct omap_hwmod dra7xx_pciess1_hwmod = {
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.name = "pcie1",
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.class = &dra7xx_pciess_hwmod_class,
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.clkdm_name = "pcie_clkdm",
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.rst_lines = dra7xx_pciess1_resets,
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.rst_lines_cnt = ARRAY_SIZE(dra7xx_pciess1_resets),
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.main_clk = "l4_root_clk_div",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS1_CLKCTRL_OFFSET,
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.rstctrl_offs = DRA7XX_RM_L3INIT_PCIESS_RSTCTRL_OFFSET,
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.context_offs = DRA7XX_RM_L3INIT_PCIESS1_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* pcie2 */
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static struct omap_hwmod_rst_info dra7xx_pciess2_resets[] = {
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{ .name = "pcie", .rst_shift = 1 },
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};
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/* pcie2 */
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static struct omap_hwmod dra7xx_pciess2_hwmod = {
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.name = "pcie2",
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.class = &dra7xx_pciess_hwmod_class,
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.clkdm_name = "pcie_clkdm",
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.rst_lines = dra7xx_pciess2_resets,
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.rst_lines_cnt = ARRAY_SIZE(dra7xx_pciess2_resets),
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.main_clk = "l4_root_clk_div",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS2_CLKCTRL_OFFSET,
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.rstctrl_offs = DRA7XX_RM_L3INIT_PCIESS_RSTCTRL_OFFSET,
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.context_offs = DRA7XX_RM_L3INIT_PCIESS2_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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@ -360,6 +360,7 @@
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/* PRM.L3INIT_PRM register offsets */
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#define DRA7XX_PM_L3INIT_PWRSTCTRL_OFFSET 0x0000
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#define DRA7XX_PM_L3INIT_PWRSTST_OFFSET 0x0004
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#define DRA7XX_RM_L3INIT_PCIESS_RSTCTRL_OFFSET 0x0010
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#define DRA7XX_PM_L3INIT_MMC1_WKDEP_OFFSET 0x0028
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#define DRA7XX_RM_L3INIT_MMC1_CONTEXT_OFFSET 0x002c
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#define DRA7XX_PM_L3INIT_MMC2_WKDEP_OFFSET 0x0030
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