From 9024fb08159ae8f3a707c9f1facb878c84aae735 Mon Sep 17 00:00:00 2001 From: Lang Yu Date: Fri, 22 Jan 2021 16:42:01 +0800 Subject: [PATCH] drm/amd/display: fix 64-bit division issue on 32-bit OS Replace "/" with div_u64 for 32-bit OS. On 32-bit OS, the use of "/" for 64-bit division will cause build error, i.e. "__udivdi3/__divdi3 undefined!". Fixes: ea7154d8d9fb26 ("drm/amd/display: Update dcn30_apply_idle_power_optimizations() code") Signed-off-by: Lang Yu Acked-by: Huang Rui Reviewed-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c index dff83c6a142a..9620fb8a27dc 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c @@ -772,8 +772,8 @@ bool dcn30_apply_idle_power_optimizations(struct dc *dc, bool enable) cursor_cache_enable ? &cursor_attr : NULL)) { unsigned int v_total = stream->adjust.v_total_max ? stream->adjust.v_total_max : stream->timing.v_total; - unsigned int refresh_hz = (unsigned long long) stream->timing.pix_clk_100hz * - 100LL / (v_total * stream->timing.h_total); + unsigned int refresh_hz = div_u64((unsigned long long) stream->timing.pix_clk_100hz * + 100LL, (v_total * stream->timing.h_total)); /* * one frame time in microsec: @@ -800,8 +800,8 @@ bool dcn30_apply_idle_power_optimizations(struct dc *dc, bool enable) unsigned int denom = refresh_hz * 6528; unsigned int stutter_period = dc->current_state->perf_params.stutter_period_us; - tmr_delay = (((1000000LL + 2 * stutter_period * refresh_hz) * - (100LL + dc->debug.mall_additional_timer_percent) + denom - 1) / + tmr_delay = div_u64(((1000000LL + 2 * stutter_period * refresh_hz) * + (100LL + dc->debug.mall_additional_timer_percent) + denom - 1), denom) - 64LL; /* scale should be increased until it fits into 6 bits */ @@ -815,8 +815,8 @@ bool dcn30_apply_idle_power_optimizations(struct dc *dc, bool enable) } denom *= 2; - tmr_delay = (((1000000LL + 2 * stutter_period * refresh_hz) * - (100LL + dc->debug.mall_additional_timer_percent) + denom - 1) / + tmr_delay = div_u64(((1000000LL + 2 * stutter_period * refresh_hz) * + (100LL + dc->debug.mall_additional_timer_percent) + denom - 1), denom) - 64LL; }