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net: dsa: b53: Define EEE register page

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In preparation for migrating the EEE code from bcm_sf2 to b53, define the full
EEE register page and offsets within that page.

Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Florian Fainelli 2017-09-19 10:46:49 -07:00 committed by David S. Miller
parent b409a9efa1
commit 909d812a66
1 changed files with 41 additions and 0 deletions
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41
drivers/net/dsa/b53/b53_regs.h
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@ -50,6 +50,9 @@
/* Jumbo Frame Registers */
#define B53_JUMBO_PAGE 0x40
/* EEE Control Registers Page */
#define B53_EEE_PAGE 0x92
/* CFP Configuration Registers Page */
#define B53_CFP_PAGE 0xa1
@ -471,6 +474,44 @@
#define JMS_MIN_SIZE 1518
#define JMS_MAX_SIZE 9724
/*************************************************************************
* EEE Configuration Page Registers
*************************************************************************/
/* EEE Enable control register (16 bit) */
#define B53_EEE_EN_CTRL 0x00
/* EEE LPI assert status register (16 bit) */
#define B53_EEE_LPI_ASSERT_STS 0x02
/* EEE LPI indicate status register (16 bit) */
#define B53_EEE_LPI_INDICATE 0x4
/* EEE Receiving idle symbols status register (16 bit) */
#define B53_EEE_RX_IDLE_SYM_STS 0x6
/* EEE Pipeline timer register (32 bit) */
#define B53_EEE_PIP_TIMER 0xC
/* EEE Sleep timer Gig register (32 bit) */
#define B53_EEE_SLEEP_TIMER_GIG(i) (0x10 + 4 * (i))
/* EEE Sleep timer FE register (32 bit) */
#define B53_EEE_SLEEP_TIMER_FE(i) (0x34 + 4 * (i))
/* EEE Minimum LP timer Gig register (32 bit) */
#define B53_EEE_MIN_LP_TIMER_GIG(i) (0x58 + 4 * (i))
/* EEE Minimum LP timer FE register (32 bit) */
#define B53_EEE_MIN_LP_TIMER_FE(i) (0x7c + 4 * (i))
/* EEE Wake timer Gig register (16 bit) */
#define B53_EEE_WAKE_TIMER_GIG(i) (0xa0 + 2 * (i))
/* EEE Wake timer FE register (16 bit) */
#define B53_EEE_WAKE_TIMER_FE(i) (0xb2 + 2 * (i))
/*************************************************************************
* CFP Configuration Page Registers
*************************************************************************/