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ASoC: cs4265: fix MMTLR Data switch control

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The MMTLR bit is in the CS4265_SPDIF_CTL2 register at address 0x12 bit 0
and not at address 0x0 bit 1. Fix this.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
This commit is contained in:
Sébastien Szymanski 2018-09-06 11:16:00 +02:00 committed by Mark Brown
parent 2a665dba01
commit 90a3b7f8ab
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GPG Key ID: 24D68B725D5487D0
1 changed files with 2 additions and 2 deletions
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4
sound/soc/codecs/cs4265.c
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@ -157,8 +157,8 @@ static const struct snd_kcontrol_new cs4265_snd_controls[] = {
SOC_SINGLE("Validity Bit Control Switch", CS4265_SPDIF_CTL2,
3, 1, 0),
SOC_ENUM("SPDIF Mono/Stereo", spdif_mono_stereo_enum),
SOC_SINGLE("MMTLR Data Switch", 0,
1, 1, 0),
SOC_SINGLE("MMTLR Data Switch", CS4265_SPDIF_CTL2,
0, 1, 0),
SOC_ENUM("Mono Channel Select", spdif_mono_select_enum),
SND_SOC_BYTES("C Data Buffer", CS4265_C_DATA_BUFF, 24),
};