drm/i915/fb: Fix rounding error in subsampled plane size calculation
For NV12 FBs with odd main surface tile-row height the CCS surface height was incorrectly calculated 1 less than the actual value. Fix this by rounding up the result of divison. For consistency do the same for the CCS surface width calculation. Fixes: b3e57bccd68a ("drm/i915/tgl: Gen-12 render decompression") Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211026225105.2783797-2-imre.deak@intel.com (cherry picked from commit 2ee5ef9c934ad26376c9282171e731e6c0339815) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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@ -378,8 +378,8 @@ static void intel_fb_plane_dims(const struct intel_framebuffer *fb, int color_pl
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intel_fb_plane_get_subsampling(&main_hsub, &main_vsub, &fb->base, main_plane);
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intel_fb_plane_get_subsampling(&hsub, &vsub, &fb->base, color_plane);
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*w = main_width / main_hsub / hsub;
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*h = main_height / main_vsub / vsub;
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*w = DIV_ROUND_UP(main_width, main_hsub * hsub);
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*h = DIV_ROUND_UP(main_height, main_vsub * vsub);
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}
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static u32 intel_adjust_tile_offset(int *x, int *y,
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