drm/bridge: tfp410: add pclk limits
Add pixel clock limits to the driver as per TFP410 datasheet: min 25MHz, max 165MHz. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200121094655.9092-1-tomi.valkeinen@ti.com
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@ -167,10 +167,23 @@ static void tfp410_disable(struct drm_bridge *bridge)
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gpiod_set_value_cansleep(dvi->powerdown, 1);
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}
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static enum drm_mode_status tfp410_mode_valid(struct drm_bridge *bridge,
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const struct drm_display_mode *mode)
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{
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if (mode->clock < 25000)
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return MODE_CLOCK_LOW;
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if (mode->clock > 165000)
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return MODE_CLOCK_HIGH;
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return MODE_OK;
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}
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static const struct drm_bridge_funcs tfp410_bridge_funcs = {
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.attach = tfp410_attach,
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.enable = tfp410_enable,
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.disable = tfp410_disable,
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.mode_valid = tfp410_mode_valid,
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};
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static void tfp410_hpd_work_func(struct work_struct *work)
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