KVM: PPC: Book3S PR: Fix MSR setting when delivering interrupts
This makes sure that MSR "partial-function" bits are not transferred
to SRR1 when delivering an interrupt. This was causing failures in
guests running kernels that include commit f3d96e698e
("powerpc/mm:
Overhaul handling of bad page faults", 2017-07-19), which added code
to check bits of SRR1 on instruction storage interrupts (ISIs) that
indicate a bad page fault. The symptom was that a guest user program
that handled a signal and attempted to return from the signal handler
would get a SIGBUS signal and die.
The code that generated ISIs and some other interrupts would
previously set bits in the guest MSR to indicate the interrupt status
and then call kvmppc_book3s_queue_irqprio(). This technique no
longer works now that kvmppc_inject_interrupt() is masking off those
bits. Instead we make kvmppc_core_queue_data_storage() and
kvmppc_core_queue_inst_storage() call kvmppc_inject_interrupt()
directly, and make sure that all the places that generate ISIs or
DSIs call kvmppc_core_queue_{data,inst}_storage instead of
kvmppc_book3s_queue_irqprio().
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
This commit is contained in:
parent
b71dc519a9
commit
916ccadccd
@ -134,7 +134,7 @@ void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
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{
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kvmppc_unfixup_split_real(vcpu);
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kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu));
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kvmppc_set_srr1(vcpu, kvmppc_get_msr(vcpu) | flags);
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kvmppc_set_srr1(vcpu, (kvmppc_get_msr(vcpu) & ~0x783f0000ul) | flags);
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kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec);
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vcpu->arch.mmu.reset_msr(vcpu);
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}
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@ -256,18 +256,15 @@ void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar,
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{
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kvmppc_set_dar(vcpu, dar);
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kvmppc_set_dsisr(vcpu, flags);
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kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE);
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kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, 0);
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}
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EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage); /* used by kvm_hv */
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EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage);
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void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags)
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{
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u64 msr = kvmppc_get_msr(vcpu);
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msr &= ~(SRR1_ISI_NOPT | SRR1_ISI_N_OR_G | SRR1_ISI_PROT);
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msr |= flags & (SRR1_ISI_NOPT | SRR1_ISI_N_OR_G | SRR1_ISI_PROT);
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kvmppc_set_msr_fast(vcpu, msr);
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kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE);
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kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, flags);
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}
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EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage);
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static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
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unsigned int priority)
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@ -728,24 +728,20 @@ int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
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pte.may_execute = !data;
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}
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if (page_found == -ENOENT) {
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/* Page not found in guest PTE entries */
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u64 ssrr1 = vcpu->arch.shadow_srr1;
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u64 msr = kvmppc_get_msr(vcpu);
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kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
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kvmppc_set_dsisr(vcpu, vcpu->arch.fault_dsisr);
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kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL));
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kvmppc_book3s_queue_irqprio(vcpu, vec);
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} else if (page_found == -EPERM) {
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/* Storage protection */
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u32 dsisr = vcpu->arch.fault_dsisr;
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u64 ssrr1 = vcpu->arch.shadow_srr1;
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u64 msr = kvmppc_get_msr(vcpu);
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kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
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dsisr = (dsisr & ~DSISR_NOHPTE) | DSISR_PROTFAULT;
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kvmppc_set_dsisr(vcpu, dsisr);
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kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL));
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kvmppc_book3s_queue_irqprio(vcpu, vec);
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if (page_found == -ENOENT || page_found == -EPERM) {
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/* Page not found in guest PTE entries, or protection fault */
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u64 flags;
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if (page_found == -EPERM)
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flags = DSISR_PROTFAULT;
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else
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flags = DSISR_NOHPTE;
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if (data) {
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flags |= vcpu->arch.fault_dsisr & DSISR_ISSTORE;
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kvmppc_core_queue_data_storage(vcpu, eaddr, flags);
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} else {
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kvmppc_core_queue_inst_storage(vcpu, flags);
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}
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} else if (page_found == -EINVAL) {
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/* Page not found in guest SLB */
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kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
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@ -1178,10 +1174,8 @@ int kvmppc_handle_exit_pr(struct kvm_run *run, struct kvm_vcpu *vcpu,
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kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL);
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r = RESUME_GUEST;
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} else {
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u64 msr = kvmppc_get_msr(vcpu);
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msr |= shadow_srr1 & 0x58000000;
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kvmppc_set_msr_fast(vcpu, msr);
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kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
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kvmppc_core_queue_inst_storage(vcpu,
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shadow_srr1 & 0x58000000);
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r = RESUME_GUEST;
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}
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break;
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@ -1220,9 +1214,7 @@ int kvmppc_handle_exit_pr(struct kvm_run *run, struct kvm_vcpu *vcpu,
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r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr);
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srcu_read_unlock(&vcpu->kvm->srcu, idx);
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} else {
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kvmppc_set_dar(vcpu, dar);
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kvmppc_set_dsisr(vcpu, fault_dsisr);
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kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
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kvmppc_core_queue_data_storage(vcpu, dar, fault_dsisr);
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r = RESUME_GUEST;
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}
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break;
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