mmc: sdhci: Change SDMA address register for v4 mode
According to the SD host controller specification version 4.10, when Host Version 4 is enabled, SDMA uses ADMA System Address register (05Fh-058h) instead of using SDMA System Address register to support both 32-bit and 64-bit addressing. Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -736,7 +736,7 @@ static void sdhci_adma_table_post(struct sdhci_host *host,
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}
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}
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static u32 sdhci_sdma_address(struct sdhci_host *host)
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static dma_addr_t sdhci_sdma_address(struct sdhci_host *host)
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{
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if (host->bounce_buffer)
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return host->bounce_addr;
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@ -744,6 +744,17 @@ static u32 sdhci_sdma_address(struct sdhci_host *host)
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return sg_dma_address(host->data->sg);
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}
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static void sdhci_set_sdma_addr(struct sdhci_host *host, dma_addr_t addr)
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{
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if (host->v4_mode) {
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sdhci_writel(host, addr, SDHCI_ADMA_ADDRESS);
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if (host->flags & SDHCI_USE_64_BIT_DMA)
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sdhci_writel(host, (u64)addr >> 32, SDHCI_ADMA_ADDRESS_HI);
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} else {
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sdhci_writel(host, addr, SDHCI_DMA_ADDRESS);
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}
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}
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static unsigned int sdhci_target_timeout(struct sdhci_host *host,
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struct mmc_command *cmd,
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struct mmc_data *data)
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@ -1003,8 +1014,7 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd)
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SDHCI_ADMA_ADDRESS_HI);
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} else {
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WARN_ON(sg_cnt != 1);
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sdhci_writel(host, sdhci_sdma_address(host),
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SDHCI_DMA_ADDRESS);
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sdhci_set_sdma_addr(host, sdhci_sdma_address(host));
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}
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}
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@ -2839,7 +2849,7 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
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* some controllers are faulty, don't trust them.
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*/
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if (intmask & SDHCI_INT_DMA_END) {
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u32 dmastart, dmanow;
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dma_addr_t dmastart, dmanow;
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dmastart = sdhci_sdma_address(host);
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dmanow = dmastart + host->data->bytes_xfered;
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@ -2847,12 +2857,12 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
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* Force update to the next DMA block boundary.
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*/
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dmanow = (dmanow &
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~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1)) +
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~((dma_addr_t)SDHCI_DEFAULT_BOUNDARY_SIZE - 1)) +
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SDHCI_DEFAULT_BOUNDARY_SIZE;
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host->data->bytes_xfered = dmanow - dmastart;
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DBG("DMA base 0x%08x, transferred 0x%06x bytes, next 0x%08x\n",
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dmastart, host->data->bytes_xfered, dmanow);
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sdhci_writel(host, dmanow, SDHCI_DMA_ADDRESS);
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DBG("DMA base %pad, transferred 0x%06x bytes, next %pad\n",
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&dmastart, host->data->bytes_xfered, &dmanow);
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sdhci_set_sdma_addr(host, dmanow);
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}
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if (intmask & SDHCI_INT_DATA_END) {
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@ -3606,8 +3616,8 @@ int sdhci_setup_host(struct sdhci_host *host)
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}
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}
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/* SDMA does not support 64-bit DMA */
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if (host->flags & SDHCI_USE_64_BIT_DMA)
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/* SDMA does not support 64-bit DMA if v4 mode not set */
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if ((host->flags & SDHCI_USE_64_BIT_DMA) && !host->v4_mode)
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host->flags &= ~SDHCI_USE_SDMA;
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if (host->flags & SDHCI_USE_ADMA) {
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