dt-bindings: PCI: qcom: Support additional MSI vectors
On Qualcomm platforms each group of 32 MSI vectors is routed to the separate GIC interrupt. Document mapping of additional interrupts. Link: https://lore.kernel.org/r/20220707134733.2436629-6-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
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@ -43,11 +43,12 @@ properties:
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maxItems: 5
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interrupts:
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maxItems: 1
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minItems: 1
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maxItems: 8
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interrupt-names:
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items:
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- const: msi
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minItems: 1
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maxItems: 8
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# Common definitions for clocks, clock-names and reset.
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# Platform constraints are described later.
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@ -623,6 +624,50 @@ allOf:
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- resets
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- reset-names
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# Newer chipsets support either 1 or 8 MSI vectors
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# On older chipsets it's always 1 MSI vector
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,pcie-msm8996
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- qcom,pcie-sc7280
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- qcom,pcie-sc8180x
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- qcom,pcie-sdm845
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- qcom,pcie-sm8150
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- qcom,pcie-sm8250
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- qcom,pcie-sm8450-pcie0
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- qcom,pcie-sm8450-pcie1
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then:
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oneOf:
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- properties:
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interrupts:
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maxItems: 1
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interrupt-names:
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items:
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- const: msi
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- properties:
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interrupts:
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minItems: 8
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interrupt-names:
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items:
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- const: msi0
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- const: msi1
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- const: msi2
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- const: msi3
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- const: msi4
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- const: msi5
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- const: msi6
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- const: msi7
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else:
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properties:
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interrupts:
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maxItems: 1
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interrupt-names:
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items:
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- const: msi
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unevaluatedProperties: false
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examples:
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