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drm/amdgpu: Fix interrupt handling on ih_soft ring

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[ Upstream commit de8341ee3ce7316883e836a2c4e9bf01ab651e0f ]

There are no backing hardware registers for ih_soft ring.
As a result, don't try to access hardware registers for read
and write pointers when processing interrupts on the IH soft
ring.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Mukul Joshi 2022-08-12 15:23:51 -04:00 committed by Greg Kroah-Hartman
parent 09186eeffd
commit 933020e6d0
3 changed files with 18 additions and 3 deletions
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7
drivers/gpu/drm/amd/amdgpu/navi10_ih.c
View File

@ -409,9 +409,11 @@ static u32 navi10_ih_get_wptr(struct amdgpu_device *adev,
u32 wptr, tmp;
struct amdgpu_ih_regs *ih_regs;
if (ih == &adev->irq.ih) {
if (ih == &adev->irq.ih || ih == &adev->irq.ih_soft) {
/* Only ring0 supports writeback. On other rings fall back
* to register-based code with overflow checking below.
* ih_soft ring doesn't have any backing hardware registers,
* update wptr and return.
*/
wptr = le32_to_cpu(*ih->wptr_cpu);
@ -483,6 +485,9 @@ static void navi10_ih_set_rptr(struct amdgpu_device *adev,
{
struct amdgpu_ih_regs *ih_regs;
if (ih == &adev->irq.ih_soft)
return;
if (ih->use_doorbell) {
/* XXX check if swapping is necessary on BE */
*ih->rptr_cpu = ih->rptr;

7
drivers/gpu/drm/amd/amdgpu/vega10_ih.c
View File

@ -334,9 +334,11 @@ static u32 vega10_ih_get_wptr(struct amdgpu_device *adev,
u32 wptr, tmp;
struct amdgpu_ih_regs *ih_regs;
if (ih == &adev->irq.ih) {
if (ih == &adev->irq.ih || ih == &adev->irq.ih_soft) {
/* Only ring0 supports writeback. On other rings fall back
* to register-based code with overflow checking below.
* ih_soft ring doesn't have any backing hardware registers,
* update wptr and return.
*/
wptr = le32_to_cpu(*ih->wptr_cpu);
@ -409,6 +411,9 @@ static void vega10_ih_set_rptr(struct amdgpu_device *adev,
{
struct amdgpu_ih_regs *ih_regs;
if (ih == &adev->irq.ih_soft)
return;
if (ih->use_doorbell) {
/* XXX check if swapping is necessary on BE */
*ih->rptr_cpu = ih->rptr;

7
drivers/gpu/drm/amd/amdgpu/vega20_ih.c
View File

@ -385,9 +385,11 @@ static u32 vega20_ih_get_wptr(struct amdgpu_device *adev,
u32 wptr, tmp;
struct amdgpu_ih_regs *ih_regs;
if (ih == &adev->irq.ih) {
if (ih == &adev->irq.ih || ih == &adev->irq.ih_soft) {
/* Only ring0 supports writeback. On other rings fall back
* to register-based code with overflow checking below.
* ih_soft ring doesn't have any backing hardware registers,
* update wptr and return.
*/
wptr = le32_to_cpu(*ih->wptr_cpu);
@ -461,6 +463,9 @@ static void vega20_ih_set_rptr(struct amdgpu_device *adev,
{
struct amdgpu_ih_regs *ih_regs;
if (ih == &adev->irq.ih_soft)
return;
if (ih->use_doorbell) {
/* XXX check if swapping is necessary on BE */
*ih->rptr_cpu = ih->rptr;